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https://github.com/AsahiLinux/u-boot
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2d67a095dc
Driver for Cadence EDAC DDR controller, as found in the Renesas RZ/N1. Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
28 lines
823 B
Makefile
28 lines
823 B
Makefile
# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright (c) 2015 Google, Inc
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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obj-$(CONFIG_$(SPL_TPL_)DM) += ram-uclass.o
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obj-$(CONFIG_MPC83XX_SDRAM) += mpc83xx_sdram.o
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obj-$(CONFIG_SANDBOX) += sandbox_ram.o
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obj-$(CONFIG_STM32MP1_DDR) += stm32mp1/
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obj-$(CONFIG_STM32_SDRAM) += stm32_sdram.o
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obj-$(CONFIG_ARCH_BMIPS) += bmips_ram.o
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obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
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obj-$(CONFIG_K3_AM654_DDRSS) += k3-am654-ddrss.o
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obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/
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obj-$(CONFIG_ARCH_ASPEED) += aspeed/
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obj-$(CONFIG_K3_DDRSS) += k3-ddrss/
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obj-$(CONFIG_IMXRT_SDRAM) += imxrt_sdram.o
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obj-$(CONFIG_RAM_SIFIVE) += sifive/
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ifdef CONFIG_SPL_BUILD
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obj-$(CONFIG_SPL_STARFIVE_DDR) += starfive/
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endif
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obj-$(CONFIG_ARCH_OCTEON) += octeon/
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obj-$(CONFIG_CADENCE_DDR_CTRL) += cadence/
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