u-boot/arch/riscv
Zong Li 213ed175b0 riscv: lib: implement enable_caches for sifive cache
The enable_caches is a generic hook for architecture-implemented, we
define this function to enable composable cache of sifive platforms.

In sifive_cache, it invokes the generic cache_enable interface of cache
uclass to execute the relative implementation in SiFive ccache driver.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-09-07 10:34:29 +08:00
..
cpu riscv: cpu: fu740: Fix typo of date 2021-08-17 19:28:37 +08:00
dts board: sifive: drop stuff related to unmatched revision 1 2021-07-21 16:39:57 +08:00
include/asm board: sifive: Add an interface to get PCB revision 2021-07-06 20:24:25 +08:00
lib riscv: lib: implement enable_caches for sifive cache 2021-09-07 10:34:29 +08:00
config.mk kconfig / kbuild: Re-sync with Linux 4.19 2020-04-10 11:18:32 -04:00
Kconfig riscv: lib: implement enable_caches for sifive cache 2021-09-07 10:34:29 +08:00
Makefile riscv: add Kconfig entries for the code model 2018-12-18 09:56:26 +08:00