mirror of
https://github.com/AsahiLinux/u-boot
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2aee173ba0
This function is the same for each device when it needs to shutdown the R5 core. Move this to the common section and move the remaining device specific ID list to the device hardware include. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
61 lines
1.8 KiB
C
61 lines
1.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* K3: AM6 SoC definitions, structures etc.
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*
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* (C) Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
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*/
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#ifndef __ASM_ARCH_AM6_HARDWARE_H
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#define __ASM_ARCH_AM6_HARDWARE_H
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#include <config.h>
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#ifndef __ASSEMBLY__
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#include <linux/bitops.h>
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#endif
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#define CTRL_MMR0_BASE 0x00100000
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#define WKUP_CTRL_MMR0_BASE 0x43000000
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#define MCU_CTRL_MMR0_BASE 0x40f00000
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#define CTRLMMR_MAIN_DEVSTAT (CTRL_MMR0_BASE + 0x30)
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#define CTRLMMR_MAIN_DEVSTAT_BOOTMODE_MASK GENMASK(3, 0)
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#define CTRLMMR_MAIN_DEVSTAT_BOOTMODE_SHIFT 0
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#define CTRLMMR_MAIN_DEVSTAT_BKUP_BOOTMODE_MASK GENMASK(6, 4)
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#define CTRLMMR_MAIN_DEVSTAT_BKUP_BOOTMODE_SHIFT 4
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#define CTRLMMR_MAIN_DEVSTAT_MMC_PORT_MASK GENMASK(12, 12)
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#define CTRLMMR_MAIN_DEVSTAT_MMC_PORT_SHIFT 12
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#define CTRLMMR_MAIN_DEVSTAT_EMMC_PORT_MASK GENMASK(14, 14)
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#define CTRLMMR_MAIN_DEVSTAT_EMMC_PORT_SHIFT 14
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#define CTRLMMR_MAIN_DEVSTAT_BKUP_MMC_PORT_MASK GENMASK(17, 17)
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#define CTRLMMR_MAIN_DEVSTAT_BKUP_MMC_PORT_SHIFT 12
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#define CTRLMMR_MAIN_DEVSTAT_USB_MODE_SHIFT 9
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#define CTRLMMR_MAIN_DEVSTAT_USB_MODE_MASK GENMASK(10, 9)
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/* MCU SCRATCHPAD usage */
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#define TI_SRAM_SCRATCH_BOARD_EEPROM_START CONFIG_SYS_K3_MCU_SCRATCHPAD_BASE
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/* NAVSS Northbridge config */
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#define NAVSS0_NBSS_NB0_CFG_BASE 0x03802000
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#define NAVSS0_NBSS_NB1_CFG_BASE 0x03803000
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#define NAVSS_NBSS_THREADMAP 0x10
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#if defined(CONFIG_SYS_K3_SPL_ATF) && !defined(__ASSEMBLY__)
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#define AM6_DEV_MCU_RTI0 134
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#define AM6_DEV_MCU_RTI1 135
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#define AM6_DEV_MCU_ARMSS0_CPU0 159
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#define AM6_DEV_MCU_ARMSS0_CPU1 245
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static const u32 put_device_ids[] = {
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AM6_DEV_MCU_RTI0,
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AM6_DEV_MCU_RTI1,
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};
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static const u32 put_core_ids[] = {
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AM6_DEV_MCU_ARMSS0_CPU1,
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AM6_DEV_MCU_ARMSS0_CPU0, /* Handle CPU0 after CPU1 */
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};
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#endif
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#endif /* __ASM_ARCH_AM6_HARDWARE_H */
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