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u-boot/arch/arm/mach-k3/Kconfig
Manorit Chawdhry 30a7ee87fd Kconfig: j721s2: Change K3_MCU_SCRATCHPAD_BASE to non firewalled region 
On K3 HS-SE devices all the firewalls are locked by default
until sysfw comes up. Rom configures some of the firewall for its usage
along with the SRAM for R5 but the PSRAM region is still locked.

The K3 MCU Scratchpad for j721s2 was set to a PSRAM region triggering the
firewall exception before sysfw came up. The exception started happening
after adding multi dtb support that accesses the scratchpad for reading
EEPROM contents.

Old map:
┌─────────────────────────────────────┐ 0x41c00000
│                 SPL                 │
├─────────────────────────────────────┤ 0x41c61f20 (approx)
│                STACK                │
├─────────────────────────────────────┤ 0x41c65f20
│             Global data             │
│  sizeof(struct global_data) = 0xd8  │
├─────────────────────────────────────┤ gd->malloc_base = 0x41c66000
│                HEAP                 │
│  CONFIG_SYS_MALLOC_F_LEN = 0x10000  │
├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR
│               SPL BSS               │ (0x41c76000)
│  CONFIG_SPL_BSS_MAX_SIZE = 0xA000   │
├─────────────────────────────────────┤ (0x41c80000)
│               DM DATA               │
├─────────────────────────────────────┤ (0x41c84130) (approx)
│                EMPTY                │
└─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX
				        (0x41cffbfc)

New map:
┌─────────────────────────────────────┐ 0x41c00000
│                 SPL                 │
├─────────────────────────────────────┤ 0x41c61f20 (approx)
│                STACK                │
├─────────────────────────────────────┤ 0x41c65f20
│             Global data             │
│  sizeof(struct global_data) = 0xd8  │
├─────────────────────────────────────┤ gd->malloc_base = 0x41c66000
│                HEAP                 │
│  CONFIG_SYS_MALLOC_F_LEN = 0x10000  │
├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR
│               SPL BSS               │ (0x41c76000)
│  CONFIG_SPL_BSS_MAX_SIZE = 0xA000   │
├─────────────────────────────────────┤ (0x41c80000)
│               DM DATA               │
├─────────────────────────────────────┤ (0x41c84130) (approx)
│                EMPTY                │
├─────────────────────────────────────┤ SYS_K3_MCU_SCRATCHPAD_BASE
│              SCRATCHPAD             │ (0x41cff9fc)
│ SYS_K3_MCU_SCRATCHPAD_SIZE = 0x200  │
└─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX
				        (0x41cffbfc)

Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-05-04 13:06:22 -04:00

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if ARCH_K3
choice
prompt "Texas Instruments' K3 based SoC select"
optional
config SOC_K3_AM654
bool "TI's K3 based AM654 SoC Family Support"
config SOC_K3_J721E
bool "TI's K3 based J721E SoC Family Support"
config SOC_K3_J721S2
bool "TI's K3 based J721S2 SoC Family Support"
config SOC_K3_AM642
bool "TI's K3 based AM642 SoC Family Support"
config SOC_K3_AM625
bool "TI's K3 based AM625 SoC Family Support"
config SOC_K3_AM62A7
bool "TI's K3 based AM62A7 SoC Family Support"
endchoice
config SYS_SOC
default "k3"
config SYS_K3_NON_SECURE_MSRAM_SIZE
hex
default 0x80000 if SOC_K3_AM654
default 0x100000 if SOC_K3_J721E || SOC_K3_J721S2
default 0x1c0000 if SOC_K3_AM642
default 0x3c000 if SOC_K3_AM625 || SOC_K3_AM62A7
help
Describes the total size of the MCU or OCMC MSRAM present on
the SoC in use. This doesn't specify the total size of SPL as
ROM can use some part of this RAM. Once ROM gives control to
SPL then this complete size can be usable.
config SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE
hex
default 0x58000 if SOC_K3_AM654
default 0xc0000 if SOC_K3_J721E || SOC_K3_J721S2
default 0x180000 if SOC_K3_AM642
default 0x38000 if SOC_K3_AM625 || SOC_K3_AM62A7
help
Describes the maximum size of the image that ROM can download
from any boot media.
config SYS_K3_MCU_SCRATCHPAD_BASE
hex
default 0x40280000 if SOC_K3_AM654
default 0x41cff9fc if SOC_K3_J721E || SOC_K3_J721S2
help
Describes the base address of MCU Scratchpad RAM.
config SYS_K3_MCU_SCRATCHPAD_SIZE
hex
default 0x200 if SOC_K3_AM654
default 0x200 if SOC_K3_J721E || SOC_K3_J721S2
help
Describes the size of MCU Scratchpad RAM.
config SYS_K3_BOOT_PARAM_TABLE_INDEX
hex
default 0x41c7fbfc if SOC_K3_AM654
default 0x41cffbfc if SOC_K3_J721E
default 0x41cfdbfc if SOC_K3_J721S2
default 0x701bebfc if SOC_K3_AM642
default 0x43c3f290 if SOC_K3_AM625
default 0x43c3f290 if SOC_K3_AM62A7 && CPU_V7R
default 0x7000f290 if SOC_K3_AM62A7 && ARM64
help
Address at which ROM stores the value which determines if SPL
is booted up by primary boot media or secondary boot media.
config SYS_K3_KEY
string "Key used to generate x509 certificate"
help
This option enables to provide a custom key that can be used for
generating x509 certificate for spl binary. If not needed leave
it blank so that a random key is generated and used.
config SYS_K3_BOOT_CORE_ID
int
default 16
config K3_EARLY_CONS
bool "Activate to allow for an early console during SPL"
depends on SPL
help
Turn this option on to enable an early console functionality in SPL
before the main console is being brought up. This can be useful in
situations where the main console is dependent on System Firmware
(SYSFW) being up and running, which is usually not the case during
the very early stages of boot. Using this early console functionality
will allow for an alternate serial port to be used to support things
like UART-based boot and early diagnostic messages until the main
console is ready to get activated.
config K3_EARLY_CONS_IDX
depends on K3_EARLY_CONS
int "Index of serial device to use for SPL early console"
default 1
help
Use this option to set the index of the serial device to be used
for the early console during SPL execution.
config K3_LOAD_SYSFW
bool
depends on SPL
config K3_SYSFW_IMAGE_NAME
string "File name of SYSFW firmware and configuration blob"
depends on K3_LOAD_SYSFW
default "sysfw.itb"
help
Filename of the combined System Firmware and configuration image tree
blob to be loaded when booting from a filesystem.
config K3_SYSFW_IMAGE_MMCSD_RAW_MODE_SECT
hex "MMC sector to load SYSFW firmware and configuration blob from"
depends on K3_LOAD_SYSFW && SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
default 0x3600
help
Address on the MMC to load the combined System Firmware and
configuration image tree blob from, when the MMC is being used
in raw mode. Units: MMC sectors (1 sector = 512 bytes).
config K3_SYSFW_IMAGE_MMCSD_RAW_MODE_PART
hex "MMC partition to load SYSFW firmware and configuration blob from"
depends on K3_LOAD_SYSFW && SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
default 2
help
Partition on the MMC to the combined System Firmware and configuration
image tree blob from, when the MMC is being used in raw mode.
config K3_SYSFW_IMAGE_SIZE_MAX
int "Amount of memory dynamically allocated for loading SYSFW blob"
depends on K3_LOAD_SYSFW
default 163840 if SOC_K3_AM625 || SOC_K3_AM62A7
default 278000
help
Amount of memory (in bytes) reserved through dynamic allocation at
runtime for loading the combined System Firmware and configuration image
tree blob. Keep it as tight as possible, as this directly affects the
overall SPL memory footprint.
config K3_SYSFW_IMAGE_SPI_OFFS
hex "SPI offset of SYSFW firmware and configuration blob"
depends on K3_LOAD_SYSFW
default 0x6C0000
help
Offset of the combined System Firmware and configuration image tree
blob to be loaded when booting from a SPI flash memory.
config SYS_K3_SPL_ATF
bool "Start Cortex-A from SPL"
depends on SPL && CPU_V7R
help
Enabling this will try to start Cortex-A (typically with ATF)
after SPL from R5.
config K3_ATF_LOAD_ADDR
hex "Load address of ATF image"
default 0x70000000
help
The load address for the ATF image. This value defaults to 0x70000000
if not provided in the board defconfig file.
config K3_DM_FW
bool "Separate DM firmware image"
depends on SPL && CPU_V7R && (SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_AM625 || SOC_K3_AM62A7) && !CLK_TI_SCI && !TI_SCI_POWER_DOMAIN
default y
help
Enabling this will indicate that the system has separate DM
and TIFS firmware images in place, instead of a single SYSFW
firmware. Due to DM being executed on the same core as R5 SPL
bootloader, it makes RM and PM services not being available
during R5 SPL execution time.
config K3_X509_SWRV
int "SWRV for X509 certificate used for boot images"
default 1
help
SWRV for X509 certificate used for boot images
source "board/ti/am65x/Kconfig"
source "board/ti/am64x/Kconfig"
source "board/ti/am62x/Kconfig"
source "board/ti/am62ax/Kconfig"
source "board/ti/j721e/Kconfig"
source "board/siemens/iot2050/Kconfig"
source "board/ti/j721s2/Kconfig"
endif
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