u-boot/arch
Nishanth Menon 94c6a89a99 ARM: mach-omap2: omap3/am335x: Enable ACR::IBE on Cortex-A8 SoCs for CVE-2017-5715
Enable CVE-2017-5715 option to set the IBE bit. This enables kernel
workarounds necessary for the said CVE.

With this enabled, Linux reports:
CPU0: Spectre v2: using BPIALL workaround

This workaround may need to be re-applied in OS environment around low
power transition resume states where context of ACR would be lost (off-mode
etc).

Signed-off-by: Nishanth Menon <nm@ti.com>
2018-06-29 11:30:39 -04:00
..
arc .gitignore: move *.dtb and *.dtb.S patterns to the top-level .gitignore 2018-06-18 14:43:12 -04:00
arm ARM: mach-omap2: omap3/am335x: Enable ACR::IBE on Cortex-A8 SoCs for CVE-2017-5715 2018-06-29 11:30:39 -04:00
m68k m68k: Remove empty #ifdef/#ifndef block 2018-06-18 14:02:03 -04:00
microblaze .gitignore: move *.dtb and *.dtb.S patterns to the top-level .gitignore 2018-06-18 14:43:12 -04:00
mips .gitignore: move *.dtb and *.dtb.S patterns to the top-level .gitignore 2018-06-18 14:43:12 -04:00
nds32 nds32: Define PLATFORM__CLEAR_BIT for generic_clear_bit() 2018-05-15 21:44:05 -04:00
nios2 .gitignore: move *.dtb and *.dtb.S patterns to the top-level .gitignore 2018-06-18 14:43:12 -04:00
powerpc common: Fix cpu nr type which is always unsigned type 2018-06-19 07:31:45 -04:00
riscv riscv: dts: Support cfi flash 2018-05-29 14:45:04 +08:00
sandbox .gitignore: move *.dtb and *.dtb.S patterns to the top-level .gitignore 2018-06-18 14:43:12 -04:00
sh SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
x86 x86: efi: payload: Count in conventional memory above 4GB in DRAM bank 2018-06-24 08:56:25 +08:00
xtensa SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
.gitignore .gitignore: drop include/asm/proc from ignore pattern 2014-06-19 11:18:54 -04:00
Kconfig Convert CONFIG_SPI to Kconfig 2018-04-27 14:54:11 -04:00