mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-17 16:53:06 +00:00
9fb8e24804
Specification: - Rockchip RK3399 - 4GB Dual-Channel LPDDR4 - eMMC socket - mSD card slot - 128Mbit (16Mb) SPI Flash - AP6256 for 11AC WiFi + BT5 - 14 inch 1920*1080 eDP MiPi display - Camera - USB 3.0, 2.0 ports - Type-C port with alt-mode display (DP 1.2) and 15W charge - DC 5V/3A - optional PCIe slot for NVMe SSD drive Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Tested-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
75 lines
1.6 KiB
C
75 lines
1.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* (C) Copyright 2016 Rockchip Electronics Co., Ltd
|
|
* (C) Copyright 2020 Peter Robinson <pbrobinson at gmail.com>
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <dm.h>
|
|
#include <syscon.h>
|
|
#include <asm/io.h>
|
|
#include <asm/arch-rockchip/clock.h>
|
|
#include <asm/arch-rockchip/grf_rk3399.h>
|
|
#include <asm/arch-rockchip/hardware.h>
|
|
#include <asm/arch-rockchip/misc.h>
|
|
#include <power/regulator.h>
|
|
|
|
#define GRF_IO_VSEL_BT565_SHIFT 0
|
|
#define PMUGRF_CON0_VSEL_SHIFT 8
|
|
|
|
#ifndef CONFIG_SPL_BUILD
|
|
int board_early_init_f(void)
|
|
{
|
|
struct udevice *regulator;
|
|
int ret;
|
|
|
|
ret = regulator_get_by_platname("vcc5v0_usb", ®ulator);
|
|
if (ret) {
|
|
pr_debug("%s vcc5v0_usb init fail! ret %d\n", __func__, ret);
|
|
goto out;
|
|
}
|
|
|
|
ret = regulator_set_enable(regulator, true);
|
|
if (ret)
|
|
pr_debug("%s vcc5v0-host-en-gpio set fail! ret %d\n", __func__, ret);
|
|
|
|
out:
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
#ifdef CONFIG_MISC_INIT_R
|
|
static void setup_iodomain(void)
|
|
{
|
|
struct rk3399_grf_regs *grf =
|
|
syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
|
|
struct rk3399_pmugrf_regs *pmugrf =
|
|
syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
|
|
|
|
/* BT565 is in 1.8v domain */
|
|
rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT);
|
|
|
|
/* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */
|
|
rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT);
|
|
}
|
|
|
|
int misc_init_r(void)
|
|
{
|
|
const u32 cpuid_offset = 0x7;
|
|
const u32 cpuid_length = 0x10;
|
|
u8 cpuid[cpuid_length];
|
|
int ret;
|
|
|
|
setup_iodomain();
|
|
|
|
ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = rockchip_cpuid_set(cpuid, cpuid_length);
|
|
if (ret)
|
|
return ret;
|
|
|
|
return ret;
|
|
}
|
|
#endif
|