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51f00c1704
At present these functions are not accessible outside the TPM library, but in some cases we need to call them. Export them in the header file and add a define for the SHA1 digest size. Also adjust tpm_open() to call tpm_close() first so that the TPM is in a known state before opening (e.g. by a previous phase of U-Boot). Signed-off-by: Simon Glass <sjg@chromium.org>
477 lines
12 KiB
C
477 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2011 The Chromium OS Authors.
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*/
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/*
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* The code in this file is based on the article "Writing a TPM Device Driver"
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* published on http://ptgmedia.pearsoncmg.com.
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*
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* One principal difference is that in the simplest config the other than 0
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* TPM localities do not get mapped by some devices (for instance, by Infineon
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* slb9635), so this driver provides access to locality 0 only.
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*/
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#include <common.h>
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#include <dm.h>
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#include <mapmem.h>
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#include <tpm-v1.h>
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#include <asm/io.h>
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#define PREFIX "lpc_tpm: "
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enum i2c_chip_type {
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SLB9635,
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AT97SC3204,
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};
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static const char * const chip_name[] = {
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[SLB9635] = "Infineon SLB9635 TT 1.2",
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[AT97SC3204] = "Atmel AT97SC3204",
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};
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static const u32 chip_didvid[] = {
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[SLB9635] = 0xb15d1,
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[AT97SC3204] = 0x32041114,
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};
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struct tpm_locality {
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u32 access;
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u8 padding0[4];
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u32 int_enable;
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u8 vector;
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u8 padding1[3];
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u32 int_status;
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u32 int_capability;
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u32 tpm_status;
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u8 padding2[8];
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u8 data;
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u8 padding3[3803];
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u32 did_vid;
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u8 rid;
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u8 padding4[251];
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};
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struct tpm_tis_lpc_priv {
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struct tpm_locality *regs;
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};
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/*
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* This pointer refers to the TPM chip, 5 of its localities are mapped as an
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* array.
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*/
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#define TPM_TOTAL_LOCALITIES 5
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/* Some registers' bit field definitions */
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#define TIS_STS_VALID (1 << 7) /* 0x80 */
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#define TIS_STS_COMMAND_READY (1 << 6) /* 0x40 */
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#define TIS_STS_TPM_GO (1 << 5) /* 0x20 */
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#define TIS_STS_DATA_AVAILABLE (1 << 4) /* 0x10 */
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#define TIS_STS_EXPECT (1 << 3) /* 0x08 */
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#define TIS_STS_RESPONSE_RETRY (1 << 1) /* 0x02 */
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#define TIS_ACCESS_TPM_REG_VALID_STS (1 << 7) /* 0x80 */
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#define TIS_ACCESS_ACTIVE_LOCALITY (1 << 5) /* 0x20 */
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#define TIS_ACCESS_BEEN_SEIZED (1 << 4) /* 0x10 */
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#define TIS_ACCESS_SEIZE (1 << 3) /* 0x08 */
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#define TIS_ACCESS_PENDING_REQUEST (1 << 2) /* 0x04 */
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#define TIS_ACCESS_REQUEST_USE (1 << 1) /* 0x02 */
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#define TIS_ACCESS_TPM_ESTABLISHMENT (1 << 0) /* 0x01 */
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#define TIS_STS_BURST_COUNT_MASK (0xffff)
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#define TIS_STS_BURST_COUNT_SHIFT (8)
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/* 1 second is plenty for anything TPM does. */
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#define MAX_DELAY_US (1000 * 1000)
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/* Retrieve burst count value out of the status register contents. */
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static u16 burst_count(u32 status)
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{
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return (status >> TIS_STS_BURST_COUNT_SHIFT) &
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TIS_STS_BURST_COUNT_MASK;
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}
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/* TPM access wrappers to support tracing */
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static u8 tpm_read_byte(struct tpm_tis_lpc_priv *priv, const u8 *ptr)
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{
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u8 ret = readb(ptr);
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debug(PREFIX "Read reg 0x%4.4x returns 0x%2.2x\n",
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(u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, ret);
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return ret;
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}
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static u32 tpm_read_word(struct tpm_tis_lpc_priv *priv, const u32 *ptr)
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{
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u32 ret = readl(ptr);
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debug(PREFIX "Read reg 0x%4.4x returns 0x%8.8x\n",
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(u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, ret);
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return ret;
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}
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static void tpm_write_byte(struct tpm_tis_lpc_priv *priv, u8 value, u8 *ptr)
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{
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debug(PREFIX "Write reg 0x%4.4x with 0x%2.2x\n",
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(u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, value);
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writeb(value, ptr);
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}
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static void tpm_write_word(struct tpm_tis_lpc_priv *priv, u32 value,
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u32 *ptr)
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{
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debug(PREFIX "Write reg 0x%4.4x with 0x%8.8x\n",
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(u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, value);
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writel(value, ptr);
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}
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/*
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* tis_wait_reg()
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*
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* Wait for at least a second for a register to change its state to match the
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* expected state. Normally the transition happens within microseconds.
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*
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* @reg - pointer to the TPM register
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* @mask - bitmask for the bitfield(s) to watch
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* @expected - value the field(s) are supposed to be set to
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*
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* Returns the register contents in case the expected value was found in the
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* appropriate register bits, or -ETIMEDOUT on timeout.
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*/
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static int tis_wait_reg(struct tpm_tis_lpc_priv *priv, u32 *reg, u8 mask,
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u8 expected)
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{
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u32 time_us = MAX_DELAY_US;
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while (time_us > 0) {
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u32 value = tpm_read_word(priv, reg);
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if ((value & mask) == expected)
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return value;
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udelay(1); /* 1 us */
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time_us--;
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}
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return -ETIMEDOUT;
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}
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/*
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* Probe the TPM device and try determining its manufacturer/device name.
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*
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* Returns 0 on success, -ve on error
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*/
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static int tpm_tis_lpc_probe(struct udevice *dev)
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{
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struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
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fdt_addr_t addr;
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u32 didvid;
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ulong chip_type = dev_get_driver_data(dev);
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addr = dev_read_addr(dev);
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if (addr == FDT_ADDR_T_NONE)
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return -EINVAL;
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priv->regs = map_sysmem(addr, 0);
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didvid = tpm_read_word(priv, &priv->regs[0].did_vid);
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if (didvid != chip_didvid[chip_type]) {
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u32 vid, did;
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vid = didvid & 0xffff;
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did = (didvid >> 16) & 0xffff;
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debug("Invalid vendor/device ID %04x/%04x\n", vid, did);
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return -ENODEV;
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}
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debug("Found TPM: %s\n", chip_name[chip_type]);
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return 0;
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}
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/*
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* tis_senddata()
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*
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* send the passed in data to the TPM device.
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*
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* @data - address of the data to send, byte by byte
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* @len - length of the data to send
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*
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* Returns 0 on success, -ve on error (in case the device does not accept
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* the entire command).
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*/
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static int tis_senddata(struct udevice *dev, const u8 *data, size_t len)
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{
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struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
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struct tpm_locality *regs = priv->regs;
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u32 offset = 0;
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u16 burst = 0;
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u32 max_cycles = 0;
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u8 locality = 0;
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u32 value;
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value = tis_wait_reg(priv, ®s[locality].tpm_status,
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TIS_STS_COMMAND_READY, TIS_STS_COMMAND_READY);
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if (value == -ETIMEDOUT) {
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printf("%s:%d - failed to get 'command_ready' status\n",
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__FILE__, __LINE__);
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return value;
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}
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burst = burst_count(value);
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while (1) {
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unsigned count;
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/* Wait till the device is ready to accept more data. */
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while (!burst) {
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if (max_cycles++ == MAX_DELAY_US) {
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printf("%s:%d failed to feed %zd bytes of %zd\n",
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__FILE__, __LINE__, len - offset, len);
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return -ETIMEDOUT;
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}
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udelay(1);
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burst = burst_count(tpm_read_word(priv,
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®s[locality].tpm_status));
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}
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max_cycles = 0;
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/*
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* Calculate number of bytes the TPM is ready to accept in one
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* shot.
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*
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* We want to send the last byte outside of the loop (hence
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* the -1 below) to make sure that the 'expected' status bit
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* changes to zero exactly after the last byte is fed into the
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* FIFO.
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*/
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count = min((size_t)burst, len - offset - 1);
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while (count--)
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tpm_write_byte(priv, data[offset++],
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®s[locality].data);
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value = tis_wait_reg(priv, ®s[locality].tpm_status,
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TIS_STS_VALID, TIS_STS_VALID);
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if ((value == -ETIMEDOUT) || !(value & TIS_STS_EXPECT)) {
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printf("%s:%d TPM command feed overflow\n",
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__FILE__, __LINE__);
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return value == -ETIMEDOUT ? value : -EIO;
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}
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burst = burst_count(value);
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if ((offset == (len - 1)) && burst) {
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/*
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* We need to be able to send the last byte to the
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* device, so burst size must be nonzero before we
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* break out.
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*/
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break;
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}
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}
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/* Send the last byte. */
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tpm_write_byte(priv, data[offset++], ®s[locality].data);
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/*
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* Verify that TPM does not expect any more data as part of this
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* command.
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*/
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value = tis_wait_reg(priv, ®s[locality].tpm_status,
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TIS_STS_VALID, TIS_STS_VALID);
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if ((value == -ETIMEDOUT) || (value & TIS_STS_EXPECT)) {
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printf("%s:%d unexpected TPM status 0x%x\n",
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__FILE__, __LINE__, value);
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return value == -ETIMEDOUT ? value : -EIO;
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}
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/* OK, sitting pretty, let's start the command execution. */
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tpm_write_word(priv, TIS_STS_TPM_GO, ®s[locality].tpm_status);
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return 0;
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}
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/*
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* tis_readresponse()
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*
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* read the TPM device response after a command was issued.
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*
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* @buffer - address where to read the response, byte by byte.
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* @len - pointer to the size of buffer
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*
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* On success stores the number of received bytes to len and returns 0. On
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* errors (misformatted TPM data or synchronization problems) returns
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* -ve value.
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*/
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static int tis_readresponse(struct udevice *dev, u8 *buffer, size_t len)
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{
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struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
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struct tpm_locality *regs = priv->regs;
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u16 burst;
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u32 value;
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u32 offset = 0;
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u8 locality = 0;
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const u32 has_data = TIS_STS_DATA_AVAILABLE | TIS_STS_VALID;
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u32 expected_count = len;
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int max_cycles = 0;
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/* Wait for the TPM to process the command. */
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value = tis_wait_reg(priv, ®s[locality].tpm_status,
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has_data, has_data);
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if (value == -ETIMEDOUT) {
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printf("%s:%d failed processing command\n",
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__FILE__, __LINE__);
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return value;
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}
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do {
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while ((burst = burst_count(value)) == 0) {
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if (max_cycles++ == MAX_DELAY_US) {
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printf("%s:%d TPM stuck on read\n",
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__FILE__, __LINE__);
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return -EIO;
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}
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udelay(1);
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value = tpm_read_word(priv, ®s[locality].tpm_status);
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}
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max_cycles = 0;
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while (burst-- && (offset < expected_count)) {
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buffer[offset++] = tpm_read_byte(priv,
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®s[locality].data);
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if (offset == 6) {
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/*
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* We got the first six bytes of the reply,
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* let's figure out how many bytes to expect
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* total - it is stored as a 4 byte number in
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* network order, starting with offset 2 into
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* the body of the reply.
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*/
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u32 real_length;
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memcpy(&real_length,
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buffer + 2,
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sizeof(real_length));
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expected_count = be32_to_cpu(real_length);
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if ((expected_count < offset) ||
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(expected_count > len)) {
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printf("%s:%d bad response size %d\n",
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__FILE__, __LINE__,
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expected_count);
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return -ENOSPC;
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}
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}
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}
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/* Wait for the next portion. */
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value = tis_wait_reg(priv, ®s[locality].tpm_status,
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TIS_STS_VALID, TIS_STS_VALID);
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if (value == -ETIMEDOUT) {
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printf("%s:%d failed to read response\n",
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__FILE__, __LINE__);
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return value;
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}
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if (offset == expected_count)
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break; /* We got all we needed. */
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} while ((value & has_data) == has_data);
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/*
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* Make sure we indeed read all there was. The TIS_STS_VALID bit is
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* known to be set.
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*/
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if (value & TIS_STS_DATA_AVAILABLE) {
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printf("%s:%d wrong receive status %x\n",
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__FILE__, __LINE__, value);
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return -EBADMSG;
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}
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/* Tell the TPM that we are done. */
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tpm_write_word(priv, TIS_STS_COMMAND_READY,
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®s[locality].tpm_status);
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return offset;
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}
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static int tpm_tis_lpc_close(struct udevice *dev)
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{
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struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
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struct tpm_locality *regs = priv->regs;
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u8 locality = 0;
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if (tpm_read_word(priv, ®s[locality].access) &
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TIS_ACCESS_ACTIVE_LOCALITY) {
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tpm_write_word(priv, TIS_ACCESS_ACTIVE_LOCALITY,
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®s[locality].access);
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if (tis_wait_reg(priv, ®s[locality].access,
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TIS_ACCESS_ACTIVE_LOCALITY, 0) == -ETIMEDOUT) {
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printf("%s:%d - failed to release locality %d\n",
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__FILE__, __LINE__, locality);
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return -ETIMEDOUT;
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}
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}
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return 0;
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}
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static int tpm_tis_lpc_open(struct udevice *dev)
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{
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struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
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struct tpm_locality *regs = priv->regs;
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u8 locality = 0; /* we use locality zero for everything. */
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int ret;
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ret = tpm_tis_lpc_close(dev);
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if (ret) {
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printf("%s: Failed to close TPM\n", __func__);
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return ret;
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}
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/* now request access to locality. */
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tpm_write_word(priv, TIS_ACCESS_REQUEST_USE, ®s[locality].access);
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/* did we get a lock? */
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ret = tis_wait_reg(priv, ®s[locality].access,
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TIS_ACCESS_ACTIVE_LOCALITY,
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TIS_ACCESS_ACTIVE_LOCALITY);
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if (ret == -ETIMEDOUT) {
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printf("%s:%d - failed to lock locality %d\n",
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__FILE__, __LINE__, locality);
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return ret;
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}
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tpm_write_word(priv, TIS_STS_COMMAND_READY,
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®s[locality].tpm_status);
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return 0;
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}
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static int tpm_tis_get_desc(struct udevice *dev, char *buf, int size)
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{
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ulong chip_type = dev_get_driver_data(dev);
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if (size < 50)
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return -ENOSPC;
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return snprintf(buf, size, "1.2 TPM (%s)",
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chip_name[chip_type]);
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}
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static const struct tpm_ops tpm_tis_lpc_ops = {
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.open = tpm_tis_lpc_open,
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.close = tpm_tis_lpc_close,
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.get_desc = tpm_tis_get_desc,
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.send = tis_senddata,
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.recv = tis_readresponse,
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};
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static const struct udevice_id tpm_tis_lpc_ids[] = {
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{ .compatible = "infineon,slb9635lpc", .data = SLB9635 },
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{ .compatible = "atmel,at97sc3204", .data = AT97SC3204 },
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{ }
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};
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U_BOOT_DRIVER(tpm_tis_lpc) = {
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.name = "tpm_tis_lpc",
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.id = UCLASS_TPM,
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.of_match = tpm_tis_lpc_ids,
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.ops = &tpm_tis_lpc_ops,
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.probe = tpm_tis_lpc_probe,
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.priv_auto_alloc_size = sizeof(struct tpm_tis_lpc_priv),
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};
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