mirror of
https://github.com/AsahiLinux/u-boot
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
188 lines
5 KiB
C
188 lines
5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2012 The Chromium OS Authors.
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <fdtdec.h>
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#include <pch.h>
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#include <pci.h>
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#include <syscon.h>
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#include <asm/cpu.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <asm/pci.h>
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#include <asm/arch/gpio.h>
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#include <dt-bindings/gpio/x86-gpio.h>
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DECLARE_GLOBAL_DATA_PTR;
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/**
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* struct broadwell_bank_priv - Private driver data
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*
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* @regs: Pointer to GPIO registers
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* @bank: Bank number for this bank (0, 1 or 2)
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* @offset: GPIO offset for this bank (0, 32 or 64)
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*/
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struct broadwell_bank_priv {
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struct pch_lp_gpio_regs *regs;
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int bank;
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int offset;
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};
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static int broadwell_gpio_request(struct udevice *dev, unsigned offset,
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const char *label)
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{
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struct broadwell_bank_priv *priv = dev_get_priv(dev);
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struct pch_lp_gpio_regs *regs = priv->regs;
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u32 val;
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/*
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* Make sure that the GPIO pin we want isn't already in use for some
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* built-in hardware function. We have to check this for every
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* requested pin.
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*/
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debug("%s: request bank %d offset %d: ", __func__, priv->bank, offset);
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val = inl(®s->own[priv->bank]);
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if (!(val & (1UL << offset))) {
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debug("gpio is reserved for internal use\n");
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return -EPERM;
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}
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debug("ok\n");
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return 0;
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}
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static int broadwell_gpio_direction_input(struct udevice *dev, unsigned offset)
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{
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struct broadwell_bank_priv *priv = dev_get_priv(dev);
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struct pch_lp_gpio_regs *regs = priv->regs;
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setio_32(®s->config[priv->offset + offset], CONFA_DIR_INPUT);
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return 0;
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}
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static int broadwell_gpio_get_value(struct udevice *dev, unsigned offset)
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{
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struct broadwell_bank_priv *priv = dev_get_priv(dev);
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struct pch_lp_gpio_regs *regs = priv->regs;
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return inl(®s->config[priv->offset + offset]) & CONFA_LEVEL_HIGH ?
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1 : 0;
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}
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static int broadwell_gpio_set_value(struct udevice *dev, unsigned offset,
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int value)
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{
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struct broadwell_bank_priv *priv = dev_get_priv(dev);
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struct pch_lp_gpio_regs *regs = priv->regs;
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debug("%s: dev=%s, offset=%d, value=%d\n", __func__, dev->name, offset,
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value);
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clrsetio_32(®s->config[priv->offset + offset], CONFA_OUTPUT_HIGH,
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value ? CONFA_OUTPUT_HIGH : 0);
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return 0;
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}
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static int broadwell_gpio_direction_output(struct udevice *dev, unsigned offset,
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int value)
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{
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struct broadwell_bank_priv *priv = dev_get_priv(dev);
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struct pch_lp_gpio_regs *regs = priv->regs;
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broadwell_gpio_set_value(dev, offset, value);
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clrio_32(®s->config[priv->offset + offset], CONFA_DIR_INPUT);
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return 0;
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}
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static int broadwell_gpio_get_function(struct udevice *dev, unsigned offset)
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{
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struct broadwell_bank_priv *priv = dev_get_priv(dev);
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struct pch_lp_gpio_regs *regs = priv->regs;
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u32 mask = 1UL << offset;
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if (!(inl(®s->own[priv->bank]) & mask))
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return GPIOF_FUNC;
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if (inl(®s->config[priv->offset + offset]) & CONFA_DIR_INPUT)
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return GPIOF_INPUT;
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else
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return GPIOF_OUTPUT;
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}
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static int broadwell_gpio_probe(struct udevice *dev)
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{
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struct broadwell_bank_platdata *plat = dev_get_platdata(dev);
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struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
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struct broadwell_bank_priv *priv = dev_get_priv(dev);
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struct udevice *pinctrl;
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int ret;
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/* Set up pin control if available */
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ret = syscon_get_by_driver_data(X86_SYSCON_PINCONF, &pinctrl);
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debug("%s, pinctrl=%p, ret=%d\n", __func__, pinctrl, ret);
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uc_priv->gpio_count = GPIO_PER_BANK;
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uc_priv->bank_name = plat->bank_name;
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priv->regs = (struct pch_lp_gpio_regs *)(uintptr_t)plat->base_addr;
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priv->bank = plat->bank;
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priv->offset = priv->bank * 32;
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debug("%s: probe done, regs %p, bank %d\n", __func__, priv->regs,
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priv->bank);
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return 0;
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}
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static int broadwell_gpio_ofdata_to_platdata(struct udevice *dev)
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{
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struct broadwell_bank_platdata *plat = dev_get_platdata(dev);
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u32 gpiobase;
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int bank;
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int ret;
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ret = pch_get_gpio_base(dev->parent, &gpiobase);
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if (ret)
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return ret;
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bank = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), "reg", -1);
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if (bank == -1) {
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debug("%s: Invalid bank number %d\n", __func__, bank);
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return -EINVAL;
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}
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plat->bank = bank;
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plat->base_addr = gpiobase;
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plat->bank_name = fdt_getprop(gd->fdt_blob, dev_of_offset(dev),
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"bank-name", NULL);
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return 0;
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}
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static const struct dm_gpio_ops gpio_broadwell_ops = {
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.request = broadwell_gpio_request,
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.direction_input = broadwell_gpio_direction_input,
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.direction_output = broadwell_gpio_direction_output,
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.get_value = broadwell_gpio_get_value,
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.set_value = broadwell_gpio_set_value,
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.get_function = broadwell_gpio_get_function,
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};
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static const struct udevice_id intel_broadwell_gpio_ids[] = {
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{ .compatible = "intel,broadwell-gpio" },
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{ }
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};
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U_BOOT_DRIVER(gpio_broadwell) = {
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.name = "gpio_broadwell",
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.id = UCLASS_GPIO,
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.of_match = intel_broadwell_gpio_ids,
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.ops = &gpio_broadwell_ops,
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.ofdata_to_platdata = broadwell_gpio_ofdata_to_platdata,
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.probe = broadwell_gpio_probe,
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.priv_auto_alloc_size = sizeof(struct broadwell_bank_priv),
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.platdata_auto_alloc_size = sizeof(struct broadwell_bank_platdata),
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};
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