mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-01 00:49:43 +00:00
1fa943b99d
Since FSMC is a standard IP and it supports different memory interfaces, it is supported independent of spear platform and spear is configured to use that driver for interfacing with the NAND device Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
135 lines
3.9 KiB
C
135 lines
3.9 KiB
C
/*
|
|
* (C) Copyright 2009
|
|
* Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com>
|
|
*
|
|
* See file CREDITS for list of people who contributed to this
|
|
* project.
|
|
*
|
|
* This program is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU General Public License as
|
|
* published by the Free Software Foundation; either version 2 of
|
|
* the License, or (at your option) any later version.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License
|
|
* along with this program; if not, write to the Free Software
|
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
* MA 02111-1307 USA
|
|
*/
|
|
|
|
#ifndef __CONFIG_H
|
|
#define __CONFIG_H
|
|
|
|
/*
|
|
* High Level Configuration Options
|
|
* (easy to change)
|
|
*/
|
|
#if defined(CONFIG_spear300)
|
|
#define CONFIG_SPEAR3XX 1
|
|
#define CONFIG_SPEAR300 1
|
|
#elif defined(CONFIG_spear310)
|
|
#define CONFIG_SPEAR3XX 1
|
|
#define CONFIG_SPEAR310 1
|
|
#elif defined(CONFIG_spear320)
|
|
#define CONFIG_SPEAR3XX 1
|
|
#define CONFIG_SPEAR320 1
|
|
#endif
|
|
|
|
#include <configs/spear-common.h>
|
|
|
|
/* Serial Configuration (PL011) */
|
|
#define CONFIG_SYS_SERIAL0 0xD0000000
|
|
|
|
#if defined(CONFIG_SPEAR300)
|
|
#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0}
|
|
|
|
#elif defined(CONFIG_SPEAR310)
|
|
|
|
#if (CONFIG_CONS_INDEX)
|
|
#undef CONFIG_PL011_CLOCK
|
|
#define CONFIG_PL011_CLOCK (83 * 1000 * 1000)
|
|
#endif
|
|
|
|
#define CONFIG_SYS_SERIAL1 0xB2000000
|
|
#define CONFIG_SYS_SERIAL2 0xB2080000
|
|
#define CONFIG_SYS_SERIAL3 0xB2100000
|
|
#define CONFIG_SYS_SERIAL4 0xB2180000
|
|
#define CONFIG_SYS_SERIAL5 0xB2200000
|
|
#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \
|
|
(void *)CONFIG_SYS_SERIAL1, \
|
|
(void *)CONFIG_SYS_SERIAL2, \
|
|
(void *)CONFIG_SYS_SERIAL3, \
|
|
(void *)CONFIG_SYS_SERIAL4, \
|
|
(void *)CONFIG_SYS_SERIAL5 }
|
|
#elif defined(CONFIG_SPEAR320)
|
|
|
|
#if (CONFIG_CONS_INDEX)
|
|
#undef CONFIG_PL011_CLOCK
|
|
#define CONFIG_PL011_CLOCK (83 * 1000 * 1000)
|
|
#endif
|
|
|
|
#define CONFIG_SYS_SERIAL1 0xA3000000
|
|
#define CONFIG_SYS_SERIAL2 0xA4000000
|
|
#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \
|
|
(void *)CONFIG_SYS_SERIAL1, \
|
|
(void *)CONFIG_SYS_SERIAL2 }
|
|
#endif
|
|
|
|
#if defined(CONFIG_SPEAR_EMI)
|
|
|
|
#define CONFIG_SYS_FLASH_CFI
|
|
#define CONFIG_FLASH_CFI_DRIVER
|
|
|
|
#if defined(CONFIG_SPEAR310)
|
|
#define CONFIG_SYS_FLASH_BASE 0x50000000
|
|
#define CONFIG_SYS_CS1_FLASH_BASE 0x60000000
|
|
#define CONFIG_SYS_CS2_FLASH_BASE 0x70000000
|
|
#define CONFIG_SYS_CS3_FLASH_BASE 0x80000000
|
|
#define CONFIG_SYS_CS4_FLASH_BASE 0x90000000
|
|
#define CONFIG_SYS_CS5_FLASH_BASE 0xA0000000
|
|
#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, \
|
|
CONFIG_SYS_CS1_FLASH_BASE, \
|
|
CONFIG_SYS_CS2_FLASH_BASE, \
|
|
CONFIG_SYS_CS3_FLASH_BASE, \
|
|
CONFIG_SYS_CS4_FLASH_BASE, \
|
|
CONFIG_SYS_CS5_FLASH_BASE }
|
|
#define CONFIG_SYS_MAX_FLASH_BANKS 6
|
|
|
|
#elif defined(CONFIG_SPEAR320)
|
|
#define CONFIG_SYS_FLASH_BASE 0x44000000
|
|
#define CONFIG_SYS_CS1_FLASH_BASE 0x45000000
|
|
#define CONFIG_SYS_CS2_FLASH_BASE 0x46000000
|
|
#define CONFIG_SYS_CS3_FLASH_BASE 0x47000000
|
|
#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, \
|
|
CONFIG_SYS_CS1_FLASH_BASE, \
|
|
CONFIG_SYS_CS2_FLASH_BASE, \
|
|
CONFIG_SYS_CS3_FLASH_BASE }
|
|
#define CONFIG_SYS_MAX_FLASH_BANKS 4
|
|
|
|
#endif
|
|
|
|
#define CONFIG_SYS_MAX_FLASH_SECT (127 + 8)
|
|
#define CONFIG_SYS_FLASH_QUIET_TEST 1
|
|
|
|
#endif
|
|
|
|
/* NAND flash configuration */
|
|
#define CONFIG_SYS_FSMC_NAND_SP
|
|
#define CONFIG_SYS_FSMC_NAND_8BIT
|
|
|
|
#if defined(CONFIG_SPEAR300)
|
|
#define CONFIG_SYS_NAND_BASE (0x80000000)
|
|
|
|
#elif defined(CONFIG_SPEAR310)
|
|
#define CONFIG_SYS_NAND_BASE (0x40000000)
|
|
|
|
#elif defined(CONFIG_SPEAR320)
|
|
#define CONFIG_SYS_NAND_BASE (0x50000000)
|
|
|
|
#endif
|
|
|
|
#endif /* __CONFIG_H */
|