mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-04 18:41:03 +00:00
95c3b0635e
Sync the devicetree files from the official Linux kernel tree, v6.6-rc6. This is covering Allwinner SoCs with 64-bit ARM cores. Only small cosmetic changes (clock name fixed), but we add the DT for the new OrangePi Zero 3 board, for which U-Boot enablement patches are pending. As before, this omits the non-backwards compatible changes to the R_INTC controller, to remain compatible with older kernels. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
137 lines
2.6 KiB
Text
137 lines
2.6 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
/*
|
|
* Copyright (C) 2020 Arm Ltd.
|
|
*/
|
|
|
|
/dts-v1/;
|
|
|
|
#include "sun50i-h616-orangepi-zero.dtsi"
|
|
|
|
/ {
|
|
model = "OrangePi Zero2";
|
|
compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616";
|
|
};
|
|
|
|
&emac0 {
|
|
phy-supply = <®_dcdce>;
|
|
};
|
|
|
|
&mmc0 {
|
|
vmmc-supply = <®_dcdce>;
|
|
};
|
|
|
|
&r_rsb {
|
|
status = "okay";
|
|
|
|
axp305: pmic@745 {
|
|
compatible = "x-powers,axp305", "x-powers,axp805",
|
|
"x-powers,axp806";
|
|
interrupt-controller;
|
|
#interrupt-cells = <1>;
|
|
reg = <0x745>;
|
|
|
|
x-powers,self-working-mode;
|
|
vina-supply = <®_vcc5v>;
|
|
vinb-supply = <®_vcc5v>;
|
|
vinc-supply = <®_vcc5v>;
|
|
vind-supply = <®_vcc5v>;
|
|
vine-supply = <®_vcc5v>;
|
|
aldoin-supply = <®_vcc5v>;
|
|
bldoin-supply = <®_vcc5v>;
|
|
cldoin-supply = <®_vcc5v>;
|
|
|
|
regulators {
|
|
reg_aldo1: aldo1 {
|
|
regulator-always-on;
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-name = "vcc-sys";
|
|
};
|
|
|
|
reg_aldo2: aldo2 { /* 3.3V on headers */
|
|
regulator-always-on;
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-name = "vcc3v3-ext";
|
|
};
|
|
|
|
reg_aldo3: aldo3 { /* 3.3V on headers */
|
|
regulator-always-on;
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-name = "vcc3v3-ext2";
|
|
};
|
|
|
|
reg_bldo1: bldo1 {
|
|
regulator-always-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-name = "vcc1v8";
|
|
};
|
|
|
|
bldo2 {
|
|
/* unused */
|
|
};
|
|
|
|
bldo3 {
|
|
/* unused */
|
|
};
|
|
|
|
bldo4 {
|
|
/* unused */
|
|
};
|
|
|
|
cldo1 {
|
|
/* reserved */
|
|
};
|
|
|
|
cldo2 {
|
|
/* unused */
|
|
};
|
|
|
|
cldo3 {
|
|
/* unused */
|
|
};
|
|
|
|
reg_dcdca: dcdca {
|
|
regulator-always-on;
|
|
regulator-min-microvolt = <810000>;
|
|
regulator-max-microvolt = <1100000>;
|
|
regulator-name = "vdd-cpu";
|
|
};
|
|
|
|
reg_dcdcc: dcdcc {
|
|
regulator-always-on;
|
|
regulator-min-microvolt = <810000>;
|
|
regulator-max-microvolt = <990000>;
|
|
regulator-name = "vdd-gpu-sys";
|
|
};
|
|
|
|
reg_dcdcd: dcdcd {
|
|
regulator-always-on;
|
|
regulator-min-microvolt = <1500000>;
|
|
regulator-max-microvolt = <1500000>;
|
|
regulator-name = "vdd-dram";
|
|
};
|
|
|
|
reg_dcdce: dcdce {
|
|
regulator-always-on;
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-name = "vcc-eth-mmc";
|
|
};
|
|
|
|
sw {
|
|
/* unused */
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&pio {
|
|
vcc-pc-supply = <®_aldo1>;
|
|
vcc-pf-supply = <®_aldo1>;
|
|
vcc-pg-supply = <®_bldo1>;
|
|
vcc-ph-supply = <®_aldo1>;
|
|
vcc-pi-supply = <®_aldo1>;
|
|
};
|