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https://github.com/AsahiLinux/u-boot
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a3f9d6c779
The gdsys strider board is based on a Freescale MPC8308 SOC. It boots from NOR-Flash, kernel and rootfs are stored on SD-Card. On board peripherals include: - 1x 10/100 Mbit/s Ethernet (optional) - Lattice ECP3 FPGA connected via eLBC Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> [trini: Drop setting CONFIG_SYS_GENERIC_BOARD, this is always true now] Signed-off-by: Tom Rini <trini@konsulko.com>
64 lines
1.9 KiB
C
64 lines
1.9 KiB
C
/*
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* (C) Copyright 2014
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* Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/* Chrontel CH7301C DVI Transmitter */
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#include <common.h>
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#include <asm/io.h>
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#include <errno.h>
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#include <i2c.h>
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#define CH7301_I2C_ADDR 0x75
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enum {
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CH7301_CM = 0x1c, /* Clock Mode Register */
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CH7301_IC = 0x1d, /* Input Clock Register */
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CH7301_GPIO = 0x1e, /* GPIO Control Register */
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CH7301_IDF = 0x1f, /* Input Data Format Register */
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CH7301_CD = 0x20, /* Connection Detect Register */
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CH7301_DC = 0x21, /* DAC Control Register */
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CH7301_HPD = 0x23, /* Hot Plug Detection Register */
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CH7301_TCTL = 0x31, /* DVI Control Input Register */
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CH7301_TPCP = 0x33, /* DVI PLL Charge Pump Ctrl Register */
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CH7301_TPD = 0x34, /* DVI PLL Divide Register */
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CH7301_TPVT = 0x35, /* DVI PLL Supply Control Register */
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CH7301_TPF = 0x36, /* DVI PLL Filter Register */
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CH7301_TCT = 0x37, /* DVI Clock Test Register */
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CH7301_TSTP = 0x48, /* Test Pattern Register */
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CH7301_PM = 0x49, /* Power Management register */
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CH7301_VID = 0x4a, /* Version ID Register */
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CH7301_DID = 0x4b, /* Device ID Register */
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CH7301_DSP = 0x56, /* DVI Sync polarity Register */
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};
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int ch7301_i2c[] = CONFIG_SYS_CH7301_I2C;
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int ch7301_probe(unsigned screen, bool power)
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{
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u8 value;
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i2c_set_bus_num(ch7301_i2c[screen]);
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if (i2c_probe(CH7301_I2C_ADDR))
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return -1;
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value = i2c_reg_read(CH7301_I2C_ADDR, CH7301_DID);
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if (value != 0x17)
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return -1;
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if (power) {
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i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPCP, 0x08);
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i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPD, 0x16);
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i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPF, 0x60);
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i2c_reg_write(CH7301_I2C_ADDR, CH7301_DC, 0x09);
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i2c_reg_write(CH7301_I2C_ADDR, CH7301_PM, 0xc0);
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} else {
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i2c_reg_write(CH7301_I2C_ADDR, CH7301_DC, 0x00);
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i2c_reg_write(CH7301_I2C_ADDR, CH7301_PM, 0x01);
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}
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return 0;
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}
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