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3bed422094
This adds video output support for Amlogic GXBB/GXL/GXM chips. The supported ports are CVBS and HDMI (based on DW_HDMI). When using HDMI, only DMT modes are supported. There is support for simple-framebuffer (CONFIG_VIDEO_DT_SIMPLEFB) Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jorge Ramire-Ortiz <jramirez@baylibre.com> Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com> [narmstrong: fixed defines alignment in meson_canvas.c] Reviewed-by: Anatolij Gustschin <agust@denx.de>
45 lines
1.2 KiB
C
45 lines
1.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Amlogic Meson Video Processing Unit driver
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*
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* Copyright (c) 2018 BayLibre, SAS.
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*/
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#include "meson_vpu.h"
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/* DMC Registers */
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#define DMC_CAV_LUT_DATAL 0x48 /* 0x12 offset in data sheet */
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#define CANVAS_WIDTH_LBIT 29
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#define CANVAS_WIDTH_LWID 3
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#define DMC_CAV_LUT_DATAH 0x4c /* 0x13 offset in data sheet */
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#define CANVAS_WIDTH_HBIT 0
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#define CANVAS_HEIGHT_BIT 9
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#define CANVAS_BLKMODE_BIT 24
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#define DMC_CAV_LUT_ADDR 0x50 /* 0x14 offset in data sheet */
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#define CANVAS_LUT_WR_EN (0x2 << 8)
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#define CANVAS_LUT_RD_EN (0x1 << 8)
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void meson_canvas_setup(struct meson_vpu_priv *priv,
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u32 canvas_index, u32 addr,
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u32 stride, u32 height,
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unsigned int wrap,
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unsigned int blkmode)
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{
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dmc_write(DMC_CAV_LUT_DATAL,
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(((addr + 7) >> 3)) |
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(((stride + 7) >> 3) << CANVAS_WIDTH_LBIT));
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dmc_write(DMC_CAV_LUT_DATAH,
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((((stride + 7) >> 3) >> CANVAS_WIDTH_LWID) <<
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CANVAS_WIDTH_HBIT) |
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(height << CANVAS_HEIGHT_BIT) |
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(wrap << 22) |
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(blkmode << CANVAS_BLKMODE_BIT));
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dmc_write(DMC_CAV_LUT_ADDR,
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CANVAS_LUT_WR_EN | canvas_index);
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/* Force a read-back to make sure everything is flushed. */
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dmc_read(DMC_CAV_LUT_DATAH);
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}
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