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u-boot/arch/arm/cpu/armv7/ls102xa
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Tang Yuantian 1ef7ac70e2 arm: ls1021a: Adjust sata register default values 
Updated the default sata register values to enhance the
performance and stability.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-25 08:24:15 -08:00
..
clock.c driver/ifc: Add 64KB page support 2015-04-23 16:46:50 -07:00
cpu.c arm: ls102x: add get_svr and IS_SVR_REV helper 2015-12-13 18:27:28 -08:00
fdt.c ls102xa: fdt: Disable IFC in SD boot for QSPI 2015-10-29 10:33:56 -07:00
fsl_epu.c arm: ls102xa: clear EPU registers for deep sleep 2014-12-11 09:35:42 -08:00
fsl_epu.h arm: ls102xa: clear EPU registers for deep sleep 2014-12-11 09:35:42 -08:00
fsl_ls1_serdes.c arm: ls102xa: Add Freescale LS102xA SoC support 2014-09-08 10:30:32 -07:00
fsl_ls1_serdes.h arm: ls102xa: Add Freescale LS102xA SoC support 2014-09-08 10:30:32 -07:00
ls102xa_sata.c arm: ls1021a: Adjust sata register default values 2016-01-25 08:24:15 -08:00
ls102xa_serdes.c arm: ls102xa: Add Freescale LS102xA SoC support 2014-09-08 10:30:32 -07:00
Makefile arm: ls1021a: merge SoC specific code in a separate file 2015-12-13 18:27:29 -08:00
psci.S arm/ls102xa: Add PSCI support for ls102xa 2015-07-20 11:44:38 -07:00
soc.c armv7/fsl-ls102xa: Workaround for DDR erratum A008514 2015-12-15 08:57:32 +08:00
spl.c arm: ls102xa: Add SD boot support for LS1021AQDS board 2014-12-11 09:39:22 -08:00
timer.c arm: ls1021a: Ensure LS1021 ARM Generic Timer CompareValue Set 64-bit 2015-11-30 08:53:01 -08:00