mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-20 03:38:43 +00:00
7682a99826
Various files are needlessly rebuilt every time due to the version and build time changing. As version.h is not actually needed, remove the include. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefano Babic <sbabic@denx.de> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Marek Vasut <marex@denx.de> Cc: Tom Warren <twarren@nvidia.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Macpaul Lin <macpaul@andestech.com> Cc: Wolfgang Denk <wd@denx.de> Cc: York Sun <yorksun@freescale.com> Cc: Stefan Roese <sr@denx.de> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Philippe Reynes <tremyfr@yahoo.fr> Cc: Eric Jarrige <eric.jarrige@armadeus.org> Cc: "David Müller" <d.mueller@elsoft.ch> Cc: Phil Edworthy <phil.edworthy@renesas.com> Cc: Robert Baldyga <r.baldyga@samsung.com> Cc: Torsten Koschorrek <koschorrek@synertronixx.de> Cc: Anatolij Gustschin <agust@denx.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Łukasz Majewski <l.majewski@samsung.com>
61 lines
1 KiB
ArmAsm
61 lines
1 KiB
ArmAsm
/*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#include <config.h>
|
|
#include <linux/linkage.h>
|
|
|
|
ENTRY(save_boot_params)
|
|
bx lr
|
|
ENDPROC(save_boot_params)
|
|
|
|
/*
|
|
* cache_inv - invalidate Cache line
|
|
* r0 - dest
|
|
*/
|
|
.global cache_inv
|
|
.type cache_inv, %function
|
|
cache_inv:
|
|
|
|
stmfd sp!, {r1-r12}
|
|
|
|
mcr p15, 0, r0, c7, c6, 1
|
|
|
|
ldmfd sp!, {r1-r12}
|
|
bx lr
|
|
|
|
|
|
/*
|
|
* flush_l1_v6 - l1 cache clean invalidate
|
|
* r0 - dest
|
|
*/
|
|
.global flush_l1_v6
|
|
.type flush_l1_v6, %function
|
|
flush_l1_v6:
|
|
|
|
stmfd sp!, {r1-r12}
|
|
|
|
mcr p15, 0, r0, c7, c10, 5 /* @ data memory barrier */
|
|
mcr p15, 0, r0, c7, c14, 1 /* @ clean & invalidate D line */
|
|
mcr p15, 0, r0, c7, c10, 4 /* @ data sync barrier */
|
|
|
|
ldmfd sp!, {r1-r12}
|
|
bx lr
|
|
|
|
|
|
/*
|
|
* flush_l1_v7 - l1 cache clean invalidate
|
|
* r0 - dest
|
|
*/
|
|
.global flush_l1_v7
|
|
.type flush_l1_v7, %function
|
|
flush_l1_v7:
|
|
|
|
stmfd sp!, {r1-r12}
|
|
|
|
dmb /* @data memory barrier */
|
|
mcr p15, 0, r0, c7, c14, 1 /* @ clean & invalidate D line */
|
|
dsb /* @data sync barrier */
|
|
|
|
ldmfd sp!, {r1-r12}
|
|
bx lr
|