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d2a6982f9b
This patch set supports exynos display port drivers. DisplayPort is an industry standard device to accommodate the increasing board adoption of digital display technology within the PC and consumer electronics. The interface supports internal chip-to-chip and external box-to-box digital display connections. Signed-off-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
80 lines
3.4 KiB
C
80 lines
3.4 KiB
C
/*
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* Copyright (C) 2012 Samsung Electronics
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*
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* Author: Donghwa Lee <dh09.lee@samsung.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _EXYNOS_EDP_LOWLEVEL_H
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#define _EXYNOS_EDP_LOWLEVEL_H
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void exynos_dp_enable_video_bist(unsigned int enable);
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void exynos_dp_enable_video_mute(unsigned int enable);
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void exynos_dp_reset(void);
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void exynos_dp_enable_sw_func(unsigned int enable);
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unsigned int exynos_dp_set_analog_power_down(unsigned int block, u32 enable);
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unsigned int exynos_dp_get_pll_lock_status(void);
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int exynos_dp_init_analog_func(void);
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void exynos_dp_init_hpd(void);
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void exynos_dp_init_aux(void);
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void exynos_dp_config_interrupt(void);
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unsigned int exynos_dp_get_plug_in_status(void);
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unsigned int exynos_dp_detect_hpd(void);
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unsigned int exynos_dp_start_aux_transaction(void);
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unsigned int exynos_dp_write_byte_to_dpcd(unsigned int reg_addr,
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unsigned char data);
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unsigned int exynos_dp_read_byte_from_dpcd(unsigned int reg_addr,
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unsigned char *data);
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unsigned int exynos_dp_write_bytes_to_dpcd(unsigned int reg_addr,
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unsigned int count,
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unsigned char data[]);
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unsigned int exynos_dp_read_bytes_from_dpcd( unsigned int reg_addr,
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unsigned int count,
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unsigned char data[]);
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int exynos_dp_select_i2c_device( unsigned int device_addr,
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unsigned int reg_addr);
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int exynos_dp_read_byte_from_i2c(unsigned int device_addr,
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unsigned int reg_addr, unsigned int *data);
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int exynos_dp_read_bytes_from_i2c(unsigned int device_addr,
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unsigned int reg_addr, unsigned int count,
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unsigned char edid[]);
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void exynos_dp_reset_macro(void);
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void exynos_dp_set_link_bandwidth(unsigned char bwtype);
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unsigned char exynos_dp_get_link_bandwidth(void);
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void exynos_dp_set_lane_count(unsigned char count);
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unsigned int exynos_dp_get_lane_count(void);
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unsigned char exynos_dp_get_lanex_pre_emphasis(unsigned char lanecnt);
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void exynos_dp_set_lane_pre_emphasis(unsigned int level,
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unsigned char lanecnt);
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void exynos_dp_set_lanex_pre_emphasis(unsigned char request_val,
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unsigned char lanecnt);
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void exynos_dp_set_training_pattern(unsigned int pattern);
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void exynos_dp_enable_enhanced_mode(unsigned char enable);
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void exynos_dp_enable_scrambling(unsigned int enable);
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int exynos_dp_init_video(void);
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void exynos_dp_config_video_slave_mode(struct edp_video_info *video_info);
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void exynos_dp_set_video_color_format(struct edp_video_info *video_info);
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int exynos_dp_config_video_bist(struct edp_device_info *edp_info);
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unsigned int exynos_dp_is_slave_video_stream_clock_on(void);
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void exynos_dp_set_video_cr_mn(unsigned int type, unsigned int m_value,
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unsigned int n_value);
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void exynos_dp_set_video_timing_mode(unsigned int type);
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void exynos_dp_enable_video_master(unsigned int enable);
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void exynos_dp_start_video(void);
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unsigned int exynos_dp_is_video_stream_on(void);
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#endif /* _EXYNOS_DP_LOWLEVEL_H */
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