Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2024-11-29 08:01:08 +00:00
Code Issues Projects Releases Packages Wiki Activity
u-boot/drivers/clk
History
Cédric Le Goater 1e5d8aaf4f aspeed: ast2500: fix D2-PLL clock setting in RGMII mode 
The algorithm in the ast2500_calc_clock_config() routine suffers from
integer rounding and the requested rate does not get the appropriate
set of Numerator, Denumerator, Post Divider parameters.

This is the case for the D2-PLL clock used by the MAC controllers in
RGMII mode. The requested rated is 250MHz but a 251MHz is assigned.

The easiest way to fix this problem is to introduce an array of clock
settings defining the N, M, P parameters for well known frequencies
used by the Aspeed SoC.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-11-05 10:41:58 -06:00
..
altera drivers: cosmetic: Convert SPDX license tags to Linux Kernel style 2018-10-28 09:26:39 -04:00
aspeed aspeed: ast2500: fix D2-PLL clock setting in RGMII mode 2018-11-05 10:41:58 -06:00
at91 clk: at91: utmi: add timeout for utmi lock 2018-08-13 14:03:57 -04:00
exynos SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
imx clk: imx: add clk driver for i.MX8QXP 2018-10-22 12:59:01 +02:00
mvebu clk: armada-37xx-periph: Support changing clock parent and rate 2018-09-19 08:59:26 +02:00
owl drivers: cosmetic: Convert SPDX license tags to Linux Kernel style 2018-10-28 09:26:39 -04:00
renesas clk: rmobile: Add R8A77995 RPC clock 2018-06-14 13:36:33 +02:00
rockchip drivers: cosmetic: Convert SPDX license tags to Linux Kernel style 2018-10-28 09:26:39 -04:00
tegra drivers: cosmetic: Convert SPDX license tags to Linux Kernel style 2018-10-28 09:26:39 -04:00
uniphier SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
clk-hsdk-cgu.c Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR 2018-04-27 14:54:48 -04:00
clk-ti-sci.c clk: Introduce TI System Control Interface (TI SCI) clock driver 2018-09-11 08:32:55 -04:00
clk-uclass.c clk: clk_set_default: accept no-op skip fields 2018-08-04 14:50:10 -04:00
clk_bcm6345.c clk: bcm6345: convert to use live dt 2018-06-01 15:56:02 +02:00
clk_boston.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
clk_fixed_rate.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
clk_meson.c clk: clk_meson: Add mux and div support for reparent and rate setting 2018-09-10 20:48:17 -04:00
clk_meson.h clk: add Amlogic meson clock driver 2018-06-19 07:31:47 -04:00
clk_pic32.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
clk_sandbox.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
clk_sandbox_test.c clk: add clk_valid() 2018-08-03 19:53:10 -04:00
clk_stm32f.c clk: clk_stm32f: Use PLLSAIP as USB 48MHz clock 2018-05-08 09:07:34 -04:00
clk_stm32h7.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
clk_stm32mp1.c stm32mp1: clk: support digital bypass 2018-07-20 15:55:07 -04:00
clk_vexpress_osc.c clk: Add support for Arm's Versatile Express OSC clock generators 2018-09-30 13:00:34 -04:00
clk_zynq.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
clk_zynqmp.c clk: zynqmp: Fixed the same if/else part error reported by coverity 2018-07-19 10:49:53 +02:00
ics8n3qv01.c clk: Add ICS8N3QV01 driver 2018-05-08 18:50:23 -04:00
Kconfig clk: imx: add clk driver for i.MX8QXP 2018-10-22 12:59:01 +02:00
Makefile drivers: cosmetic: Convert SPDX license tags to Linux Kernel style 2018-10-28 09:26:39 -04:00
mpc83xx_clk.c clk: Add MPC83xx clock driver 2018-09-18 00:01:18 -06:00
mpc83xx_clk.h clk: Add MPC83xx clock driver 2018-09-18 00:01:18 -06:00