mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-16 08:13:17 +00:00
ca5f1e25e5
Support has been added for both HS-SE(SR 2.0), HS-FS(SR 2.0) and GP images. HS-SE: * tiboot3-j7200_sr2-hs-evm.bin * tispl.bin * u-boot.img HS-FS: * tiboot3-j7200_sr2-hs-fs-evm.bin * tispl.bin * u-boot.img GP: * tiboot3.bin --> tiboot3-j7200-gp-evm.bin * tispl.bin_unsigned * u-boot.img_unsigned It is to be noted that the bootflow followed by J7200 requires: tiboot3.bin: * R5 SPL * R5 SPL dtbs * TIFS * board-cfg * pm-cfg * sec-cfg * rm-cfg tispl.bin: * DM * ATF * OP-TEE * A72 SPL * A72 SPL dtbs u-boot.img: * A72 U-Boot * A72 U-Boot dtbs Reviewed-by: Simon Glass <sjg@chromium.org> [afd@ti.com: changed output binary names appropriately] Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
200 lines
2.7 KiB
Text
200 lines
2.7 KiB
Text
// SPDX-License-Identifier: GPL-2.0
|
|
/*
|
|
* Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
|
|
*/
|
|
|
|
#include "k3-j7200-binman.dtsi"
|
|
|
|
/ {
|
|
chosen {
|
|
stdout-path = "serial2:115200n8";
|
|
tick-timer = &timer1;
|
|
};
|
|
|
|
aliases {
|
|
ethernet0 = &cpsw_port1;
|
|
i2c0 = &wkup_i2c0;
|
|
i2c1 = &mcu_i2c0;
|
|
i2c2 = &mcu_i2c1;
|
|
i2c3 = &main_i2c0;
|
|
};
|
|
};
|
|
|
|
&cbass_main {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&main_navss {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&cbass_mcu_wakeup {
|
|
bootph-pre-ram;
|
|
|
|
timer1: timer@40400000 {
|
|
compatible = "ti,omap5430-timer";
|
|
reg = <0x0 0x40400000 0x0 0x80>;
|
|
ti,timer-alwon;
|
|
clock-frequency = <250000000>;
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
chipid@43000014 {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
mcu_navss: bus@28380000 {
|
|
bootph-pre-ram;
|
|
#address-cells = <2>;
|
|
#size-cells = <2>;
|
|
|
|
ringacc@2b800000 {
|
|
reg = <0x0 0x2b800000 0x0 0x400000>,
|
|
<0x0 0x2b000000 0x0 0x400000>,
|
|
<0x0 0x28590000 0x0 0x100>,
|
|
<0x0 0x2a500000 0x0 0x40000>,
|
|
<0x0 0x28440000 0x0 0x40000>;
|
|
reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
dma-controller@285c0000 {
|
|
reg = <0x0 0x285c0000 0x0 0x100>,
|
|
<0x0 0x284c0000 0x0 0x4000>,
|
|
<0x0 0x2a800000 0x0 0x40000>,
|
|
<0x0 0x284a0000 0x0 0x4000>,
|
|
<0x0 0x2aa00000 0x0 0x40000>,
|
|
<0x0 0x28400000 0x0 0x2000>;
|
|
reg-names = "gcfg", "rchan", "rchanrt", "tchan",
|
|
"tchanrt", "rflow";
|
|
bootph-pre-ram;
|
|
};
|
|
};
|
|
};
|
|
|
|
&secure_proxy_main {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&dmsc {
|
|
bootph-pre-ram;
|
|
k3_sysreset: sysreset-controller {
|
|
compatible = "ti,sci-sysreset";
|
|
bootph-pre-ram;
|
|
};
|
|
};
|
|
|
|
&k3_pds {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&k3_clks {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&k3_reset {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&wkup_pmx0 {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&main_pmx0 {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&main_uart0 {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&mcu_uart0 {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&main_sdhci0 {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&main_sdhci1 {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&wkup_i2c0 {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&main_i2c0 {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&main_i2c0_pins_default {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&exp2 {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&mcu_cpsw {
|
|
reg = <0x0 0x46000000 0x0 0x200000>,
|
|
<0x0 0x40f00200 0x0 0x8>;
|
|
reg-names = "cpsw_nuss", "mac_efuse";
|
|
/delete-property/ ranges;
|
|
|
|
cpsw-phy-sel@40f04040 {
|
|
compatible = "ti,am654-cpsw-phy-sel";
|
|
reg= <0x0 0x40f04040 0x0 0x4>;
|
|
reg-names = "gmii-sel";
|
|
};
|
|
};
|
|
|
|
&main_usbss0_pins_default {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&usbss0 {
|
|
bootph-pre-ram;
|
|
ti,usb2-only;
|
|
};
|
|
|
|
&usb0 {
|
|
dr_mode = "peripheral";
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&mcu_fss0_hpb0_pins_default {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&fss {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&hbmc {
|
|
bootph-pre-ram;
|
|
|
|
flash@0,0 {
|
|
bootph-pre-ram;
|
|
};
|
|
};
|
|
|
|
&hbmc_mux {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&serdes_ln_ctrl {
|
|
u-boot,mux-autoprobe;
|
|
};
|
|
|
|
&usb_serdes_mux {
|
|
u-boot,mux-autoprobe;
|
|
};
|
|
|
|
&serdes0 {
|
|
bootph-pre-ram;
|
|
};
|
|
|
|
&main_r5fss0 {
|
|
ti,cluster-mode = <0>;
|
|
};
|