u-boot/arch/arm/cpu
Meenakshi Aggarwal 1dff14c87d armv8/fsl-layerscape: Add loop to check L3 dcache status
Flushing L3 cache may need variable time depending upon cache line
allocation.

Coming up with a proper timeout value would be best handled by
simulations under multiple scenarios in your actual system.
>From the purely HN-F point of view, the flush would take ~15 cycles for
a clean line, and ~22 cycles for a dirty line.  For the dirty line case,
there are many variables outside the HN-F that will increase the
duration per line.  For example, a *DBIDResp from the SN-F/SBSX,
memory controller latency, SN-F/SBSX RetryAck responses, CCN ring
congestion, CCN ring hops, etc, etc.  The worst-case timeout would
have to factor in all of these variables plus the HN-F cycles for
every line in the L3, and assuming all lines are dirty

In case if L3 is not flushed properly, system behaviour will be
erratic, so remove timeout and add loop to check status of L3 cache.

System will stuck in while loop if there is some issue in L3 cache
flushing.

Signed-off-by: Udit Kumar <udit.kumar@nxp.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:57 +05:30
..
arm11 CONFIG_SPL_SYS_[DI]CACHE_OFF: add 2019-05-18 08:15:35 -04:00
arm720t SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
arm920t arm: remove prototype for get_timer_masked 2018-10-10 13:35:09 -04:00
arm926ejs CONFIG_SPL_SYS_[DI]CACHE_OFF: add 2019-05-18 08:15:35 -04:00
arm946es SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
arm1136 linker: Modify linker scripts to be more generic 2019-01-26 22:55:53 -05:00
arm1176 SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
armv7 armv7: timer: init timer with bootstage 2019-05-23 11:36:47 +02:00
armv7m CONFIG_SPL_SYS_[DI]CACHE_OFF: add 2019-05-18 08:15:35 -04:00
armv8 armv8/fsl-layerscape: Add loop to check L3 dcache status 2019-06-19 12:54:57 +05:30
pxa CONFIG_SPL_SYS_[DI]CACHE_OFF: add 2019-05-18 08:15:35 -04:00
sa1100 arm: remove prototype for get_timer_masked 2018-10-10 13:35:09 -04:00
Makefile SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
u-boot-spl.lds spl: fix linker size check off-by-one errors 2019-05-05 08:48:50 -04:00
u-boot.lds ARM: Specify aligned address for secure section instead of using attributes 2018-09-07 09:11:42 -04:00