mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-18 02:38:56 +00:00
2cb156e126
The GW7902 is based on the i.MX 8M Mini / Nano SoC featuring: - LPDDR4 DRAM - eMMC FLASH - Gateworks System Controller - LTE CAT M1 modem - USB 2.0 HUB - M.2 Socket with USB2.0, PCIe, and dual-SIM - IMX8M FEC - PCIe based GbE - RS232/RS485/RS422 serial transceiver - GPS - CAN bus - WiFi / Bluetooth - MIPI header (DSI/CSI/GPIO/PWM/I2S) - PMIC To add support for the i.MX8M Nano GW7902: - Add imx8mn-venice dts/defconfig/include - Add imx8mn-gw7902 dts - Add imx8mn-2gb lpddr4 dram configs - Add misc support for IMX8M Nano SoC - rename imx8mm-venice.c to venice.c as it is no longer imx8mm specific - update README with differences for IMX8MN vs IMX8MM Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
244 lines
3.4 KiB
Text
244 lines
3.4 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2022 Gateworks Corporation
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*/
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/ {
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binman: binman {
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multiple-images;
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};
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wdt-reboot {
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compatible = "wdt-reboot";
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wdt = <&wdog1>;
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u-boot,dm-spl;
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};
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};
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&{/soc@0} {
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u-boot,dm-pre-reloc;
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u-boot,dm-spl;
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};
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&clk {
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u-boot,dm-spl;
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u-boot,dm-pre-reloc;
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/delete-property/ assigned-clocks;
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/delete-property/ assigned-clock-parents;
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/delete-property/ assigned-clock-rates;
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};
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&osc_24m {
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u-boot,dm-spl;
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u-boot,dm-pre-reloc;
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};
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&aips1 {
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u-boot,dm-spl;
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u-boot,dm-pre-reloc;
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};
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&aips2 {
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u-boot,dm-spl;
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};
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&aips3 {
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u-boot,dm-spl;
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};
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&iomuxc {
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u-boot,dm-spl;
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};
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&gpio1 {
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u-boot,dm-spl;
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};
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&gpio2 {
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u-boot,dm-spl;
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};
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&gpio3 {
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u-boot,dm-spl;
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};
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&gpio4 {
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u-boot,dm-spl;
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};
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&gpio5 {
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u-boot,dm-spl;
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};
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&uart2 {
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u-boot,dm-spl;
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};
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&pinctrl_uart2 {
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u-boot,dm-spl;
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};
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&usdhc3 {
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u-boot,dm-spl;
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};
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&pinctrl_usdhc3 {
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u-boot,dm-spl;
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};
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&i2c1 {
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u-boot,dm-spl;
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};
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&pinctrl_i2c1 {
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u-boot,dm-spl;
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};
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&i2c2 {
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u-boot,dm-spl;
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};
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&pinctrl_i2c2 {
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u-boot,dm-spl;
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};
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&wdog1 {
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u-boot,dm-spl;
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};
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&binman {
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u-boot-spl-ddr {
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align = <4>;
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align-size = <4>;
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filename = "u-boot-spl-ddr.bin";
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pad-byte = <0xff>;
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u-boot-spl {
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align-end = <4>;
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filename = "u-boot-spl.bin";
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};
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1d-imem {
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filename = "lpddr4_pmu_train_1d_imem.bin";
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size = <0x8000>;
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type = "blob-ext";
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};
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1d_dmem {
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filename = "lpddr4_pmu_train_1d_dmem.bin";
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size = <0x4000>;
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type = "blob-ext";
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};
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2d_imem {
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filename = "lpddr4_pmu_train_2d_imem.bin";
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size = <0x8000>;
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type = "blob-ext";
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};
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2d_dmem {
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filename = "lpddr4_pmu_train_2d_dmem.bin";
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size = <0x4000>;
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type = "blob-ext";
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};
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};
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spl {
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filename = "spl.bin";
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mkimage {
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args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x912000";
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blob {
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filename = "u-boot-spl-ddr.bin";
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};
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};
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};
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itb {
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filename = "u-boot.itb";
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fit {
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description = "Configuration to load ATF before U-Boot";
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fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>;
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fit,fdt-list = "of-list";
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#address-cells = <1>;
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images {
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uboot {
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arch = "arm64";
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compression = "none";
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description = "U-Boot (64-bit)";
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load = <CONFIG_SYS_TEXT_BASE>;
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type = "standalone";
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uboot_blob {
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filename = "u-boot-nodtb.bin";
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type = "blob-ext";
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};
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};
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atf {
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arch = "arm64";
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compression = "none";
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description = "ARM Trusted Firmware";
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entry = <0x960000>;
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load = <0x960000>;
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type = "firmware";
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atf_blob {
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filename = "bl31.bin";
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type = "blob-ext";
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};
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};
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binman_fip: fip {
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arch = "arm64";
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compression = "none";
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description = "Trusted Firmware FIP";
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load = <0x40310000>;
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type = "firmware";
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};
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@fdt-SEQ {
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compression = "none";
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description = "NAME";
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type = "flat_dt";
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uboot_fdt_blob {
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filename = "u-boot.dtb";
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type = "blob-ext";
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};
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};
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};
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configurations {
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default = "@config-DEFAULT-SEQ";
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binman_configuration: @config-SEQ {
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description = "NAME";
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fdt = "fdt-SEQ";
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firmware = "uboot";
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loadables = "atf";
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};
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};
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};
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};
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imx-boot {
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filename = "flash.bin";
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pad-byte = <0x00>;
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spl {
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filename = "spl.bin";
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offset = <0x0>;
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type = "blob-ext";
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};
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binman_uboot: uboot {
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filename = "u-boot.itb";
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offset = <0x58000>;
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type = "blob-ext";
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};
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};
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};
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