mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-22 11:13:07 +00:00
69245e406e
This function is empty, drop it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Steven Lawrance <steven.lawrance@softathome.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
449 lines
9.8 KiB
C
449 lines
9.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2017-2019 NXP
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*
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* Copyright 2019 Siemens AG
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*
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*/
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#include <common.h>
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#include <command.h>
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#include <dm.h>
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#include <env.h>
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#include <errno.h>
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#include <init.h>
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#include <log.h>
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#include <netdev.h>
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#include <env_internal.h>
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#include <fsl_esdhc_imx.h>
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#include <i2c.h>
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#include <led.h>
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#include <pca953x.h>
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#include <power-domain.h>
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#include <asm/gpio.h>
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#include <asm/arch/imx8-pins.h>
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#include <asm/arch/iomux.h>
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#include <asm/arch/sci/sci.h>
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#include <asm/arch/sys_proto.h>
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#ifndef CONFIG_SPL
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#include <asm/arch-imx8/clock.h>
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#endif
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#include <linux/delay.h>
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#include "../common/factoryset.h"
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#define GPIO_PAD_CTRL \
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((SC_PAD_CONFIG_NORMAL << PADRING_CONFIG_SHIFT) | \
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(SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \
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(SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \
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(SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
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#define ENET_NORMAL_PAD_CTRL \
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((SC_PAD_CONFIG_NORMAL << PADRING_CONFIG_SHIFT) | \
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(SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \
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(SC_PAD_28FDSOI_DSE_18V_10MA << PADRING_DSE_SHIFT) | \
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(SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
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#define UART_PAD_CTRL \
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((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \
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(SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \
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(SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \
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(SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
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static iomux_cfg_t uart2_pads[] = {
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SC_P_UART2_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
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SC_P_UART2_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
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};
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static void setup_iomux_uart(void)
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{
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imx8_iomux_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads));
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}
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int board_early_init_f(void)
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{
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/* Set UART clock root to 80 MHz */
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sc_pm_clock_rate_t rate = SC_80MHZ;
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int ret;
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ret = sc_pm_setup_uart(SC_R_UART_0, rate);
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ret |= sc_pm_setup_uart(SC_R_UART_2, rate);
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if (ret)
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return ret;
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setup_iomux_uart();
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return 0;
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}
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#define ENET_PHY_RESET IMX_GPIO_NR(0, 3)
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#define ENET_TEST_1 IMX_GPIO_NR(0, 8)
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#define ENET_TEST_2 IMX_GPIO_NR(0, 9)
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/*#define ETH_IO_TEST*/
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static iomux_cfg_t enet_reset[] = {
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SC_P_ESAI0_SCKT | MUX_MODE_ALT(4) | MUX_PAD_CTRL(GPIO_PAD_CTRL),
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#ifdef ETH_IO_TEST
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/* GPIO0.IO08 MODE3: TXD0 */
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SC_P_ESAI0_TX4_RX1 | MUX_MODE_ALT(4) |
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MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL),
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/* GPIO0.IO09 MODE3: TXD1 */
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SC_P_ESAI0_TX5_RX0 | MUX_MODE_ALT(4) |
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MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL),
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#endif
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};
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static void enet_device_phy_reset(void)
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{
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int ret = 0;
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imx8_iomux_setup_multiple_pads(enet_reset, ARRAY_SIZE(enet_reset));
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ret = gpio_request(ENET_PHY_RESET, "enet_phy_reset");
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if (!ret) {
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gpio_direction_output(ENET_PHY_RESET, 1);
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gpio_set_value(ENET_PHY_RESET, 0);
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/* SMSC9303 TRM chapter 14.5.2 */
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udelay(200);
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gpio_set_value(ENET_PHY_RESET, 1);
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} else {
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printf("ENET RESET failed!\n");
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}
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#ifdef ETH_IO_TEST
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ret = gpio_request(ENET_TEST_1, "enet_test1");
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if (!ret) {
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int i;
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printf("ENET TEST 1!\n");
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for (i = 0; i < 20; i++) {
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gpio_direction_output(ENET_TEST_1, 1);
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gpio_set_value(ENET_TEST_1, 0);
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udelay(50);
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gpio_set_value(ENET_TEST_1, 1);
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udelay(50);
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}
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gpio_free(ENET_TEST_1);
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} else {
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printf("GPIO for ENET TEST 1 failed!\n");
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}
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ret = gpio_request(ENET_TEST_2, "enet_test2");
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if (!ret) {
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int i;
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printf("ENET TEST 2!\n");
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for (i = 0; i < 20; i++) {
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gpio_direction_output(ENET_TEST_2, 1);
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gpio_set_value(ENET_TEST_2, 0);
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udelay(50);
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gpio_set_value(ENET_TEST_2, 1);
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udelay(50);
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}
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gpio_free(ENET_TEST_2);
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} else {
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printf("GPIO for ENET TEST 2 failed!\n");
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}
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#endif
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}
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int setup_gpr_fec(void)
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{
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sc_ipc_t ipc_handle = -1;
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sc_err_t err = 0;
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unsigned int test;
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/*
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* TX_CLK_SEL: it controls a mux between clock coming from the pad 50M
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* input pin and clock generated internally to connectivity subsystem
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* 0: internal clock
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* 1: external clock ---> your choice for RMII
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*
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* CLKDIV_SEL: it controls a div by 2 on the internal clock path à
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* it should be don’t care when using external clock
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* 0: non-divided clock
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* 1: clock divided by 2
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* 50_DISABLE or 125_DISABLE:
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* it’s used to disable the clock tree going outside the chip
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* when reference clock is generated internally.
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* It should be don’t care when reference clock is provided
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* externally.
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* 0: clock is enabled
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* 1: clock is disabled
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*
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* SC_C_TXCLK = 24,
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* SC_C_CLKDIV = 25,
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* SC_C_DISABLE_50 = 26,
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* SC_C_DISABLE_125 = 27,
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*/
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err = sc_misc_set_control(ipc_handle, SC_R_ENET_1, SC_C_TXCLK, 1);
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if (err != SC_ERR_NONE)
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printf("Error in setting up SC_C %d\n\r", SC_C_TXCLK);
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sc_misc_get_control(ipc_handle, SC_R_ENET_1, SC_C_TXCLK, &test);
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debug("TEST SC_C %d-->%d\n\r", SC_C_TXCLK, test);
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err = sc_misc_set_control(ipc_handle, SC_R_ENET_1, SC_C_CLKDIV, 0);
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if (err != SC_ERR_NONE)
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printf("Error in setting up SC_C %d\n\r", SC_C_CLKDIV);
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sc_misc_get_control(ipc_handle, SC_R_ENET_1, SC_C_CLKDIV, &test);
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debug("TEST SC_C %d-->%d\n\r", SC_C_CLKDIV, test);
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err = sc_misc_set_control(ipc_handle, SC_R_ENET_1, SC_C_DISABLE_50, 0);
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if (err != SC_ERR_NONE)
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printf("Error in setting up SC_C %d\n\r", SC_C_DISABLE_50);
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sc_misc_get_control(ipc_handle, SC_R_ENET_1, SC_C_TXCLK, &test);
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debug("TEST SC_C %d-->%d\n\r", SC_C_DISABLE_50, test);
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err = sc_misc_set_control(ipc_handle, SC_R_ENET_1, SC_C_DISABLE_125, 1);
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if (err != SC_ERR_NONE)
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printf("Error in setting up SC_C %d\n\r", SC_C_DISABLE_125);
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sc_misc_get_control(ipc_handle, SC_R_ENET_1, SC_C_TXCLK, &test);
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debug("TEST SC_C %d-->%d\n\r", SC_C_DISABLE_125, test);
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err = sc_misc_set_control(ipc_handle, SC_R_ENET_1, SC_C_SEL_125, 1);
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if (err != SC_ERR_NONE)
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printf("Error in setting up SC_C %d\n\r", SC_C_SEL_125);
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sc_misc_get_control(ipc_handle, SC_R_ENET_1, SC_C_SEL_125, &test);
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debug("TEST SC_C %d-->%d\n\r", SC_C_SEL_125, test);
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return 0;
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}
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#if IS_ENABLED(CONFIG_FEC_MXC)
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#include <miiphy.h>
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int board_phy_config(struct phy_device *phydev)
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{
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if (phydev->drv->config)
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phydev->drv->config(phydev);
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return 0;
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}
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#endif
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static int setup_fec(void)
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{
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setup_gpr_fec();
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/* Reset ENET PHY */
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enet_device_phy_reset();
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return 0;
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}
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void reset_cpu(void)
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{
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}
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#ifndef CONFIG_SPL_BUILD
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/* LED's */
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static int board_led_init(void)
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{
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struct udevice *bus, *dev;
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u8 pca_led[2] = { 0x00, 0x00 };
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int ret;
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/* enable all leds on PCA9552 */
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ret = uclass_get_device_by_seq(UCLASS_I2C, PCA9552_1_I2C_BUS, &bus);
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if (ret) {
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printf("ERROR: I2C get %d\n", ret);
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return ret;
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}
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ret = dm_i2c_probe(bus, PCA9552_1_I2C_ADDR, 0, &dev);
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if (ret) {
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printf("ERROR: PCA9552 probe failed\n");
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return ret;
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}
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ret = dm_i2c_write(dev, 0x16, pca_led, sizeof(pca_led));
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if (ret) {
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printf("ERROR: PCA9552 write failed\n");
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return ret;
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}
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mdelay(1);
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return ret;
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}
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#endif /* !CONFIG_SPL_BUILD */
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int checkboard(void)
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{
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puts("Board: Capricorn\n");
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/*
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* Running build_info() doesn't work with current SCFW blob.
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* Uncomment below call when new blob is available.
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*/
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/*build_info();*/
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print_bootinfo();
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return 0;
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}
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int board_init(void)
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{
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setup_fec();
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return 0;
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}
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#ifdef CONFIG_OF_BOARD_SETUP
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int ft_board_setup(void *blob, struct bd_info *bd)
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{
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return 0;
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}
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#endif
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int board_mmc_get_env_dev(int devno)
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{
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return devno;
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}
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static int check_mmc_autodetect(void)
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{
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char *autodetect_str = env_get("mmcautodetect");
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if (autodetect_str && (strcmp(autodetect_str, "yes") == 0))
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return 1;
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return 0;
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}
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/* This should be defined for each board */
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__weak int mmc_map_to_kernel_blk(int dev_no)
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{
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return dev_no;
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}
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void board_late_mmc_env_init(void)
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{
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char cmd[32];
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char mmcblk[32];
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u32 dev_no = mmc_get_env_dev();
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if (!check_mmc_autodetect())
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return;
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env_set_ulong("mmcdev", dev_no);
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/* Set mmcblk env */
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sprintf(mmcblk, "/dev/mmcblk%dp2 rootwait rw",
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mmc_map_to_kernel_blk(dev_no));
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env_set("mmcroot", mmcblk);
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sprintf(cmd, "mmc dev %d", dev_no);
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run_command(cmd, 0);
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}
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#ifndef CONFIG_SPL_BUILD
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int factoryset_read_eeprom(int i2c_addr);
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static int load_parameters_from_factoryset(void)
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{
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int ret;
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ret = factoryset_read_eeprom(EEPROM_I2C_ADDR);
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if (ret)
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return ret;
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return factoryset_env_set();
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}
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int board_late_init(void)
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{
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env_set("sec_boot", "no");
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#ifdef CONFIG_AHAB_BOOT
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env_set("sec_boot", "yes");
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#endif
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#ifdef CONFIG_ENV_IS_IN_MMC
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board_late_mmc_env_init();
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#endif
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/* Init LEDs */
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if (board_led_init())
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printf("I2C LED init failed\n");
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/* Set environment from factoryset */
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if (load_parameters_from_factoryset())
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printf("Loading factoryset parameters failed!\n");
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return 0;
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}
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/* Service button */
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#define MAX_PIN_NUMBER 128
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#define BOARD_DEFAULT_BUTTON_GPIO IMX_GPIO_NR(1, 31)
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unsigned char get_button_state(char * const envname, unsigned char def)
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{
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int button = 0;
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int gpio;
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char *ptr_env;
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/* If button is not found we take default */
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ptr_env = env_get(envname);
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if (!ptr_env) {
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printf("Using default: %u\n", def);
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gpio = def;
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} else {
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gpio = (unsigned char)simple_strtoul(ptr_env, NULL, 0);
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if (gpio > MAX_PIN_NUMBER)
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gpio = def;
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}
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gpio_request(gpio, "");
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gpio_direction_input(gpio);
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if (gpio_get_value(gpio))
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button = 1;
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else
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button = 0;
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gpio_free(gpio);
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return button;
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}
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/*
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* This command returns the status of the user button on
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* Input - none
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* Returns - 1 if button is held down
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* 0 if button is not held down
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*/
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static int
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do_userbutton(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
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{
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int button = 0;
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button = get_button_state("button_usr1", BOARD_DEFAULT_BUTTON_GPIO);
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if (argc > 1)
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printf("Button state: %u\n", button);
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return button;
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}
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U_BOOT_CMD(
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usrbutton, CONFIG_SYS_MAXARGS, 2, do_userbutton,
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"Return the status of user button",
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"[print]"
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);
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#define ERST IMX_GPIO_NR(0, 3)
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static int
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do_eth_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
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{
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gpio_request(ERST, "ERST");
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gpio_direction_output(ERST, 0);
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udelay(200);
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gpio_set_value(ERST, 1);
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return 0;
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}
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U_BOOT_CMD(
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switch_rst, CONFIG_SYS_MAXARGS, 2, do_eth_reset,
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"Reset eth phy",
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"[print]"
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);
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#endif /* ! CONFIG_SPL_BUILD */
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