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https://github.com/AsahiLinux/u-boot
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e9ccb2f526
Add core architecture code to support the px30 soc. This includes a separate tpl board file due to very limited sram size as well as a non-dm sdram driver, as this also has to fit into the tiny sram. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
53 lines
1.3 KiB
C
53 lines
1.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* (C) Copyright 2017 Rockchip Electronics Co., Ltd
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*/
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#include <common.h>
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#include <dm.h>
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#include <syscon.h>
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#include <asm/arch-rockchip/clock.h>
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static const struct udevice_id px30_syscon_ids[] = {
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{ .compatible = "rockchip,px30-pmu", .data = ROCKCHIP_SYSCON_PMU },
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{ .compatible = "rockchip,px30-pmugrf", .data = ROCKCHIP_SYSCON_PMUGRF },
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{ .compatible = "rockchip,px30-grf", .data = ROCKCHIP_SYSCON_GRF },
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{ }
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};
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U_BOOT_DRIVER(syscon_px30) = {
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.id = UCLASS_SYSCON,
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.name = "px30_syscon",
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.of_match = px30_syscon_ids,
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};
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#if CONFIG_IS_ENABLED(OF_PLATDATA)
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static int px30_syscon_bind_of_platdata(struct udevice *dev)
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{
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dev->driver_data = dev->driver->of_match->data;
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debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data);
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return 0;
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}
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U_BOOT_DRIVER(rockchip_px30_pmu) = {
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.name = "rockchip_px30_pmu",
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.id = UCLASS_SYSCON,
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.of_match = px30_syscon_ids,
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.bind = px30_syscon_bind_of_platdata,
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};
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U_BOOT_DRIVER(rockchip_px30_pmugrf) = {
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.name = "rockchip_px30_pmugrf",
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.id = UCLASS_SYSCON,
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.of_match = px30_syscon_ids + 1,
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.bind = px30_syscon_bind_of_platdata,
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};
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U_BOOT_DRIVER(rockchip_px30_grf) = {
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.name = "rockchip_px30_grf",
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.id = UCLASS_SYSCON,
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.of_match = px30_syscon_ids + 2,
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.bind = px30_syscon_bind_of_platdata,
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};
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#endif
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