u-boot/include/configs/rk3128_common.h
Kever Yang 5f24680867 rockchip: add CONFIG_IRAM_BASE for all SoCs
Rockchip SoCs have internal sram for bootrom data area and for
sdram init program space. Introduce the base address in case
we need to use it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-26 17:30:26 +08:00

59 lines
1.4 KiB
C

/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
*/
#ifndef __CONFIG_RK3128_COMMON_H
#define __CONFIG_RK3128_COMMON_H
#include "rockchip-common.h"
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_MALLOC_LEN (32 << 20)
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_ROCKCHIP_STIMER_BASE 0x200440a0
#define COUNTER_FREQUENCY 24000000
#define CONFIG_SYS_ARCH_TIMER
#define CONFIG_SYS_HZ_CLOCK 24000000
#define CONFIG_IRAM_BASE 0x10080000
#define CONFIG_SYS_INIT_SP_ADDR 0x60100000
#define CONFIG_SYS_LOAD_ADDR 0x60800800
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
/* RAW SD card / eMMC locations. */
#define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SYS_SDRAM_BASE 0x60000000
#define SDRAM_MAX_SIZE 0x80000000
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
#ifndef CONFIG_SPL_BUILD
/* usb mass storage */
#define ENV_MEM_LAYOUT_SETTINGS \
"scriptaddr=0x60500000\0" \
"pxefile_addr_r=0x60600000\0" \
"fdt_addr_r=0x61f00000\0" \
"kernel_addr_r=0x62000000\0" \
"ramdisk_addr_r=0x64000000\0"
#include <config_distro_bootcmd.h>
#define CONFIG_EXTRA_ENV_SETTINGS \
ENV_MEM_LAYOUT_SETTINGS \
"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
"partitions=" PARTS_DEFAULT \
BOOTENV
#endif
#endif