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There are two enable methods supported by ARM64 Linux; psci and spin-table. The latter is simpler and helpful for quick SoC bring up. My main motivation for this patch is to improve the spin-table support, which allows us to boot an ARMv8 system without the ARM Trusted Firmware. Currently, we have multi-entry code in arch/arm/cpu/armv8/start.S and the spin-table is supported in a really ad-hoc way, and I see some problems: - We must hard-code CPU_RELEASE_ADDR so that it matches the "cpu-release-addr" property in the DT that comes from the kernel tree. - The Documentation/arm64/booting.txt in Linux requires that the release address must be zero-initialized, but it is not cared by the common code in U-Boot. We must do it in a board function. - There is no systematic way to protect the spin-table code from the kernel. We are supposed to do it in a board specific manner, but it is difficult to predict where the spin-table code will be located after the relocation. So, it also makes difficult to hard-code /memreserve/ in the DT of the kernel. So, here is a patch to solve those problems; the DT is run-time modified to reserve the spin-table code (+ cpu-release-addr). Also, the "cpu-release-addr" property is set to an appropriate address after the relocation, which means we no longer need the hard-coded CPU_RELEASE_ADDR. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
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.. | ||
ashldi3.S | ||
ashrdi3.S | ||
asm-offsets.c | ||
bootm-fdt.c | ||
bootm.c | ||
cache-cp15.c | ||
cache-pl310.c | ||
cache.c | ||
ccn504.S | ||
cmd_boot.c | ||
crt0.S | ||
crt0_64.S | ||
debug.S | ||
div0.c | ||
div64.S | ||
eabi_compat.c | ||
gic_64.S | ||
interrupts.c | ||
interrupts_64.c | ||
interrupts_m.c | ||
lib1funcs.S | ||
lshrdi3.S | ||
Makefile | ||
memcpy.S | ||
memset.S | ||
muldi3.S | ||
relocate.S | ||
relocate_64.S | ||
reset.c | ||
sections.c | ||
semihosting.c | ||
spl.c | ||
stack.c | ||
uldivmod.S | ||
vectors.S | ||
vectors_m.S |