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1a791892dc
LPC32xx MAC and clock control configuration requires some minor quirks to deal with a phy connected by RMII. It's worth to mention that the kernel and legacy BSP from NXP sets SUPP_RESET_RMII == (1 << 11) bit, however the description of this bit is missing in shared LPC32x0 User Manual UM10326 Rev. 3, July 22, 2011 and in LPC32x0 Draft User Mannual Rev. 00.27, November 20, 2008, also in my tests an SMSC LAN8700 phy device connected over RMII seems to work correctly without touching this bit. Add support of RMII, if CONFIG_RMII is defined, this option is aligned with a number of boards, which already define the same config value. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Tested-by: Sylvain Lemieux <slemieux@tycoint.com> |
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| arc | ||
| arm | ||
| avr32 | ||
| blackfin | ||
| m68k | ||
| microblaze | ||
| mips | ||
| nds32 | ||
| nios2 | ||
| openrisc | ||
| powerpc | ||
| sandbox | ||
| sh | ||
| sparc | ||
| x86 | ||
| .gitignore | ||
| Kconfig | ||