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1b4ca865b2
R-Car V3U has a CPG different enough to not be a generic Gen3 CPG but
similar enough to reuse code. Introduce a new CPG library, factor out
the SD clock and RPC clock handling and hook them to the generic Gen3
CPG driver so we have an equal state.
Based on Linux commit [1] and [2] by Wolfram Sang
[1] 8bb67d87346a ("clk: renesas: rcar-gen3: Factor out CPG library")
[2] 6f21d145b90f ("clk: renesas: cpg-lib: Move RPC clock registration to
the library")
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek: - Add rcar_clk_* prefix to all functions
- Rebase on changes to
clk: renesas: Introduce and use rcar_clk_get_rate64_div_table function
- Use u32_encode_bits/GENMASK bitfield ops
22 lines
1.1 KiB
Makefile
22 lines
1.1 KiB
Makefile
obj-$(CONFIG_CLK_RENESAS) += renesas-cpg-mssr.o
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obj-$(CONFIG_CLK_RCAR_CPG_LIB) += rcar-cpg-lib.o
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obj-$(CONFIG_CLK_RCAR_GEN2) += clk-rcar-gen2.o
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obj-$(CONFIG_CLK_R8A774A1) += r8a774a1-cpg-mssr.o
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obj-$(CONFIG_CLK_R8A774B1) += r8a774b1-cpg-mssr.o
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obj-$(CONFIG_CLK_R8A774C0) += r8a774c0-cpg-mssr.o
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obj-$(CONFIG_CLK_R8A774E1) += r8a774e1-cpg-mssr.o
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obj-$(CONFIG_CLK_R8A7790) += r8a7790-cpg-mssr.o
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obj-$(CONFIG_CLK_R8A7791) += r8a7791-cpg-mssr.o
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obj-$(CONFIG_CLK_R8A7792) += r8a7792-cpg-mssr.o
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obj-$(CONFIG_CLK_R8A7793) += r8a7791-cpg-mssr.o
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obj-$(CONFIG_CLK_R8A7794) += r8a7794-cpg-mssr.o
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obj-$(CONFIG_CLK_RCAR_GEN3) += clk-rcar-gen3.o
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obj-$(CONFIG_CLK_R8A7795) += r8a7795-cpg-mssr.o
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obj-$(CONFIG_CLK_R8A77960) += r8a7796-cpg-mssr.o
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obj-$(CONFIG_CLK_R8A77961) += r8a7796-cpg-mssr.o
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obj-$(CONFIG_CLK_R8A77965) += r8a77965-cpg-mssr.o
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obj-$(CONFIG_CLK_R8A77970) += r8a77970-cpg-mssr.o
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obj-$(CONFIG_CLK_R8A77980) += r8a77980-cpg-mssr.o
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obj-$(CONFIG_CLK_R8A77990) += r8a77990-cpg-mssr.o
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obj-$(CONFIG_CLK_R8A77995) += r8a77995-cpg-mssr.o
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obj-$(CONFIG_CLK_R8A779A0) += r8a779a0-cpg-mssr.o
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