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1b3c8d6402
We now have SBI v0.2 which is more scalable and extendable to handle future needs for RISC-V supervisor interfaces. Introduce a new config and move all SBI v0.1 code under that config. This allows to implement the new replacement SBI extensions cleanly and remove v0.1 extensions easily in future. Currently, the config is enabled by default. Once all M-mode software, with v0.1, is no longer in use, this config option and all relevant code can be easily removed. This commit is inspired from Linux kernel patch: https://patchwork.kernel.org/patch/11407361/ Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com> |
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.. | ||
andes_plic.c | ||
andes_plmt.c | ||
asm-offsets.c | ||
boot.c | ||
bootm.c | ||
cache.c | ||
crt0_riscv_efi.S | ||
elf_riscv32_efi.lds | ||
elf_riscv64_efi.lds | ||
image.c | ||
interrupts.c | ||
Makefile | ||
mkimage_fit_opensbi.sh | ||
rdtime.c | ||
reloc_riscv_efi.c | ||
reset.c | ||
sbi.c | ||
sbi_ipi.c | ||
setjmp.S | ||
sifive_clint.c | ||
smp.c | ||
spl.c |