u-boot/arch/arm/mach-snapdragon/pinctrl-apq8016.c
Ramon Fried ad97051b7f mach-snapdragon: Introduce pinctrl driver
This patch adds pinmux and pinctrl driver for TLMM
subsystem in snapdragon chipsets.
Currently, supporting only 8016, but implementation is
generic and 8096 can be added easily.

Driver is using the generic dt-bindings and doesn't
introduce any new bindings (yet).

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-26 18:19:16 -04:00

62 lines
1.3 KiB
C

// SPDX-License-Identifier: GPL-2.0+
/*
* Qualcomm APQ8016 pinctrl
*
* (C) Copyright 2018 Ramon Fried <ramon.fried@gmail.com>
*
*/
#include "pinctrl-snapdragon.h"
#include <common.h>
#define MAX_PIN_NAME_LEN 32
static char pin_name[MAX_PIN_NAME_LEN];
static const char * const msm_pinctrl_pins[] = {
"SDC1_CLK",
"SDC1_CMD",
"SDC1_DATA",
"SDC2_CLK",
"SDC2_CMD",
"SDC2_DATA",
"QDSD_CLK",
"QDSD_CMD",
"QDSD_DATA0",
"QDSD_DATA1",
"QDSD_DATA2",
"QDSD_DATA3",
};
static const struct pinctrl_function msm_pinctrl_functions[] = {
{"blsp1_uart", 2},
};
static const char *apq8016_get_function_name(struct udevice *dev,
unsigned int selector)
{
return msm_pinctrl_functions[selector].name;
}
static const char *apq8016_get_pin_name(struct udevice *dev,
unsigned int selector)
{
if (selector < 130) {
snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector);
return pin_name;
} else {
return msm_pinctrl_pins[selector - 130];
}
}
static unsigned int apq8016_get_function_mux(unsigned int selector)
{
return msm_pinctrl_functions[selector].val;
}
struct msm_pinctrl_data apq8016_data = {
.pin_count = 140,
.functions_count = ARRAY_SIZE(msm_pinctrl_functions),
.get_function_name = apq8016_get_function_name,
.get_function_mux = apq8016_get_function_mux,
.get_pin_name = apq8016_get_pin_name,
};