mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-28 15:41:40 +00:00
13634bb658
Commit fe97471632 ("rockchip: rk3288: Allow setting up clocks in
U-Boot proper") fixes some clock issues when chainloading U-Boot on
rk3288 chromebooks. Part of that change is still available in veyron's
board_early_init_r() function. Since chain-loading U-Boot proper from
vendor firmware is possible on gru boards as well, do the same thing for
them too.
On rk3399, this needs to detect whether SPL was run via handoff, so
enable that and bloblist kconfigs it needs for chromebook_bob.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
87 lines
2.2 KiB
Text
87 lines
2.2 KiB
Text
CONFIG_ARM=y
|
|
CONFIG_ARCH_ROCKCHIP=y
|
|
CONFIG_SYS_TEXT_BASE=0x00200000
|
|
CONFIG_SPL_GPIO_SUPPORT=y
|
|
CONFIG_NR_DRAM_BANKS=1
|
|
CONFIG_ENV_OFFSET=0x3F8000
|
|
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
|
|
CONFIG_SPL_TEXT_BASE=0xff8c2000
|
|
CONFIG_ROCKCHIP_RK3399=y
|
|
CONFIG_ROCKCHIP_BOOT_MODE_REG=0
|
|
CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
|
|
# CONFIG_SPL_MMC_SUPPORT is not set
|
|
CONFIG_DEBUG_UART_BASE=0xff1a0000
|
|
CONFIG_DEBUG_UART_CLOCK=24000000
|
|
CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
|
CONFIG_SPL_SPI_SUPPORT=y
|
|
CONFIG_DEFAULT_DEVICE_TREE="rk3399-gru-bob"
|
|
CONFIG_DEBUG_UART=y
|
|
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb"
|
|
# CONFIG_DISPLAY_CPUINFO is not set
|
|
CONFIG_DISPLAY_BOARDINFO_LATE=y
|
|
CONFIG_BOARD_EARLY_INIT_R=y
|
|
CONFIG_BLOBLIST=y
|
|
CONFIG_BLOBLIST_SIZE=0x1000
|
|
CONFIG_BLOBLIST_ADDR=0x100000
|
|
CONFIG_HANDOFF=y
|
|
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
|
CONFIG_SPL_STACK_R=y
|
|
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
|
|
CONFIG_SPL_SPI_LOAD=y
|
|
CONFIG_CMD_BOOTZ=y
|
|
CONFIG_CMD_GPIO=y
|
|
CONFIG_CMD_GPT=y
|
|
CONFIG_CMD_I2C=y
|
|
CONFIG_CMD_MMC=y
|
|
CONFIG_CMD_SF_TEST=y
|
|
CONFIG_CMD_SPI=y
|
|
CONFIG_CMD_USB=y
|
|
# CONFIG_CMD_SETEXPR is not set
|
|
CONFIG_CMD_TIME=y
|
|
CONFIG_CMD_PMIC=y
|
|
CONFIG_CMD_REGULATOR=y
|
|
CONFIG_CMD_LOG=y
|
|
CONFIG_SPL_OF_CONTROL=y
|
|
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
|
CONFIG_ENV_IS_IN_MMC=y
|
|
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
|
CONFIG_SPL_DM_SEQ_ALIAS=y
|
|
CONFIG_ROCKCHIP_GPIO=y
|
|
CONFIG_I2C_CROS_EC_TUNNEL=y
|
|
CONFIG_SYS_I2C_ROCKCHIP=y
|
|
CONFIG_I2C_MUX=y
|
|
CONFIG_DM_KEYBOARD=y
|
|
CONFIG_CROS_EC_KEYB=y
|
|
CONFIG_CROS_EC=y
|
|
CONFIG_CROS_EC_SPI=y
|
|
CONFIG_PWRSEQ=y
|
|
CONFIG_MMC_DW=y
|
|
CONFIG_MMC_DW_ROCKCHIP=y
|
|
CONFIG_MMC_SDHCI=y
|
|
CONFIG_MMC_SDHCI_ROCKCHIP=y
|
|
CONFIG_SF_DEFAULT_BUS=1
|
|
CONFIG_SF_DEFAULT_SPEED=20000000
|
|
CONFIG_SPI_FLASH_GIGADEVICE=y
|
|
CONFIG_DM_ETH=y
|
|
CONFIG_ETH_DESIGNWARE=y
|
|
CONFIG_GMAC_ROCKCHIP=y
|
|
CONFIG_PMIC_RK8XX=y
|
|
CONFIG_REGULATOR_PWM=y
|
|
CONFIG_REGULATOR_RK8XX=y
|
|
CONFIG_PWM_ROCKCHIP=y
|
|
CONFIG_DEBUG_UART_SHIFT=2
|
|
CONFIG_ROCKCHIP_SPI=y
|
|
CONFIG_SYSRESET=y
|
|
CONFIG_USB=y
|
|
CONFIG_USB_XHCI_HCD=y
|
|
CONFIG_USB_XHCI_DWC3=y
|
|
CONFIG_USB_EHCI_HCD=y
|
|
CONFIG_USB_EHCI_GENERIC=y
|
|
CONFIG_USB_HOST_ETHER=y
|
|
CONFIG_USB_ETHER_ASIX=y
|
|
CONFIG_USB_ETHER_ASIX88179=y
|
|
CONFIG_USB_ETHER_MCS7830=y
|
|
CONFIG_USB_ETHER_RTL8152=y
|
|
CONFIG_USB_ETHER_SMSC95XX=y
|
|
CONFIG_CMD_DHRYSTONE=y
|
|
CONFIG_ERRNO_STR=y
|