Marek Vasut c74d0ae519 ddr: altera: use KBUILD_BASENAME instead of __FILE__ ... The KBUILD_BASENAME contains just the name of the compiled module, in this case 'sequencer', rather than a full path to the compiled file. Use it to prevent pulling the full path into the U-Boot binary, which is useless and annoying. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com>		2021-09-28 18:50:55 +03:00
..
Kconfig	arm: socfpga: Move Stratix10 and Agilex to use TARGET_SOCFPGA_SOC64	2021-03-08 10:59:10 +08:00
Makefile	ddr: altera: Add SDRAM driver for Intel N5X device	2021-08-25 13:47:05 +08:00
sdram_agilex.c	common: Drop asm/global_data.h from common header	2021-02-02 15:33:42 -05:00
sdram_arria10.c	common: Drop asm/global_data.h from common header	2021-02-02 15:33:42 -05:00
sdram_gen5.c	dm: Use access methods for dev/uclass private data	2021-01-05 12:24:40 -07:00
sdram_n5x.c	ddr: altera: Add SDRAM driver for Intel N5X device	2021-08-25 13:47:05 +08:00
sdram_s10.c	common: Drop asm/global_data.h from common header	2021-02-02 15:33:42 -05:00
sdram_s10.h	ddr: altera: Restructure Stratix 10 SDRAM driver	2020-01-07 14:38:33 +01:00
sdram_soc64.c	ddr: altera: Add SDRAM driver for Intel N5X device	2021-08-25 13:47:05 +08:00
sdram_soc64.h	ddr: altera: Add SDRAM driver for Intel N5X device	2021-08-25 13:47:05 +08:00
sequencer.c	ddr: altera: use KBUILD_BASENAME instead of __FILE__	2021-09-28 18:50:55 +03:00
sequencer.h	ddr: altera: Add DDR2 support to Gen5 driver	2020-02-05 03:01:57 +01:00