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u-boot/arch/arm/cpu/armv8/fsl-lsch3
History
York Sun 19f9175027 armv8/fsl-lsch3: Fix platform clock calculation 
Platform clock is half of platform PLL. There is an additional divisor
in place. Clean up code copied from powerpc.

Signed-off-by: York Sun <yorksun@freescale.com>
2015-04-23 08:55:55 -07:00
..
cpu.c driver/fsl-mc: Add support of MC Flibs 2015-04-21 10:27:35 -07:00
cpu.h armv8/fsl-lsch3: Release secondary cores from boot hold off with Boot Page 2014-09-25 08:36:19 -07:00
fdt.c armv8/fsl-lsch3: Add fdt-fixup for clock frequency of the DUART nodes 2015-02-24 13:08:53 -08:00
lowlevel.S armv8/fsl-lsch3: Convert flushing L3 to assembly to avoid using stack 2015-02-24 13:08:46 -08:00
Makefile armv8/fsl-lsch3: Release secondary cores from boot hold off with Boot Page 2014-09-25 08:36:19 -07:00
mp.c ARMv8/fsl-lsch3: Patch cpu node properties in DT for online cores 2015-02-24 13:08:28 -08:00
mp.h ARMv8/fsl-lsch3: Patch cpu node properties in DT for online cores 2015-02-24 13:08:28 -08:00
README fsl-ch3/README: Add description for NOR flash layout (firmware images) 2015-04-21 10:27:07 -07:00
speed.c armv8/fsl-lsch3: Fix platform clock calculation 2015-04-23 08:55:55 -07:00
speed.h ARMv8/FSL_LSCH3: Add FSL_LSCH3 SoC 2014-07-03 08:40:51 +02:00

README 

#
# Copyright 2014 Freescale Semiconductor
#
# SPDX-License-Identifier:      GPL-2.0+
#

Freescale LayerScape with Chassis Generation 3

This architecture supports Freescale ARMv8 SoCs with Chassis generation 3,
for example LS2085A.

Flash Layout
============
A typical layout of various images (including Linux and other firmware images)
is shown below considering a 32MB NOR flash device:

	-------------------------
	|	linux		|
	------------------------- ----> 0x0120_0000
	|	Debug Server 	|
	------------------------- ----> 0x00C0_0000
	|	AIOP SW 	|
	------------------------- ----> 0x0070_0000
	|	MC FW 		|
	------------------------- ----> 0x006C_0000
	| MC Data Path Layout 	|
	------------------------- ----> 0x0020_0000
	|	BootLoader 	|
	------------------------- ----> 0x0000_1000
	|	PBI 		|
	------------------------- ----> 0x0000_0080
	|	RCW 		|
	------------------------- ----> 0x0000_0000

	32-MB NOR flash layout