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38c9f08b41
Add code to enable the SD clock on the ast2500 SoC. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Eddie James <eajames@linux.ibm.com>
126 lines
3.2 KiB
C
126 lines
3.2 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2017 Google, Inc
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <asm/io.h>
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#include <asm/arch/pinctrl.h>
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#include <asm/arch/scu_ast2500.h>
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#include <dm/pinctrl.h>
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/*
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* This driver works with very simple configuration that has the same name
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* for group and function. This way it is compatible with the Linux Kernel
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* driver.
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*/
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struct ast2500_pinctrl_priv {
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struct ast2500_scu *scu;
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};
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static int ast2500_pinctrl_probe(struct udevice *dev)
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{
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struct ast2500_pinctrl_priv *priv = dev_get_priv(dev);
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priv->scu = ast_get_scu();
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return 0;
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}
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struct ast2500_group_config {
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char *group_name;
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/* Control register number (1-10) */
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unsigned reg_num;
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/* The mask of control bits in the register */
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u32 ctrl_bit_mask;
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};
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static const struct ast2500_group_config ast2500_groups[] = {
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{ "I2C1", 8, (1 << 13) | (1 << 12) },
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{ "I2C2", 8, (1 << 15) | (1 << 14) },
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{ "I2C3", 8, (1 << 16) },
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{ "I2C4", 5, (1 << 17) },
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{ "I2C4", 5, (1 << 17) },
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{ "I2C5", 5, (1 << 18) },
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{ "I2C6", 5, (1 << 19) },
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{ "I2C7", 5, (1 << 20) },
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{ "I2C8", 5, (1 << 21) },
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{ "I2C9", 5, (1 << 22) },
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{ "I2C10", 5, (1 << 23) },
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{ "I2C11", 5, (1 << 24) },
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{ "I2C12", 5, (1 << 25) },
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{ "I2C13", 5, (1 << 26) },
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{ "I2C14", 5, (1 << 27) },
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{ "MAC1LINK", 1, (1 << 0) },
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{ "MDIO1", 3, (1 << 31) | (1 << 30) },
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{ "MAC2LINK", 1, (1 << 1) },
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{ "MDIO2", 5, (1 << 2) },
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{ "SD1", 5, (1 << 0) },
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{ "SD2", 5, (1 << 1) },
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};
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static int ast2500_pinctrl_get_groups_count(struct udevice *dev)
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{
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debug("PINCTRL: get_(functions/groups)_count\n");
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return ARRAY_SIZE(ast2500_groups);
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}
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static const char *ast2500_pinctrl_get_group_name(struct udevice *dev,
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unsigned selector)
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{
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debug("PINCTRL: get_(function/group)_name %u\n", selector);
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return ast2500_groups[selector].group_name;
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}
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static int ast2500_pinctrl_group_set(struct udevice *dev, unsigned selector,
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unsigned func_selector)
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{
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struct ast2500_pinctrl_priv *priv = dev_get_priv(dev);
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const struct ast2500_group_config *config;
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u32 *ctrl_reg;
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debug("PINCTRL: group_set <%u, %u>\n", selector, func_selector);
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if (selector >= ARRAY_SIZE(ast2500_groups))
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return -EINVAL;
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config = &ast2500_groups[selector];
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if (config->reg_num > 6)
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ctrl_reg = &priv->scu->pinmux_ctrl1[config->reg_num - 7];
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else
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ctrl_reg = &priv->scu->pinmux_ctrl[config->reg_num - 1];
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ast_scu_unlock(priv->scu);
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setbits_le32(ctrl_reg, config->ctrl_bit_mask);
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ast_scu_lock(priv->scu);
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return 0;
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}
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static struct pinctrl_ops ast2500_pinctrl_ops = {
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.set_state = pinctrl_generic_set_state,
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.get_groups_count = ast2500_pinctrl_get_groups_count,
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.get_group_name = ast2500_pinctrl_get_group_name,
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.get_functions_count = ast2500_pinctrl_get_groups_count,
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.get_function_name = ast2500_pinctrl_get_group_name,
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.pinmux_group_set = ast2500_pinctrl_group_set,
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};
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static const struct udevice_id ast2500_pinctrl_ids[] = {
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{ .compatible = "aspeed,ast2500-pinctrl" },
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{ .compatible = "aspeed,g5-pinctrl" },
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{ }
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};
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U_BOOT_DRIVER(pinctrl_ast2500) = {
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.name = "aspeed_ast2500_pinctrl",
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.id = UCLASS_PINCTRL,
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.of_match = ast2500_pinctrl_ids,
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.priv_auto_alloc_size = sizeof(struct ast2500_pinctrl_priv),
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.ops = &ast2500_pinctrl_ops,
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.probe = ast2500_pinctrl_probe,
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};
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