Kever Yang 1960b01034 rockchip: clock: rk3036: some fix according TRM ... - hclk/pclk_div range　should use '<=' instead of '<' - use GPLL for pd_bus clock source - pd_bus HCLK/PCLK clock rate should not bigger than ACLK Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>		2017-06-07 07:29:20 -06:00
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aspeed	dm: Rename dev_addr..() functions	2017-06-01 07:03:01 -06:00
at91	clk: Modify xlate() method for livetree	2017-06-01 07:03:14 -06:00
exynos	dm: Rename dev_addr..() functions	2017-06-01 07:03:01 -06:00
rockchip	rockchip: clock: rk3036: some fix according TRM	2017-06-07 07:29:20 -06:00
tegra	clock: implement a driver for the Tegra CAR	2016-09-27 09:11:02 -07:00
uniphier	dm: Rename dev_addr..() functions	2017-06-01 07:03:01 -06:00
clk-uclass.c	dm: clk: Update uclass to support livetree	2017-06-01 07:03:14 -06:00
clk_bcm6345.c	dm: Rename dev_addr..() functions	2017-06-01 07:03:01 -06:00
clk_boston.c	clk: boston: Providea simple driver for Boston board clocks	2016-09-21 15:04:32 +02:00
clk_fixed_rate.c	dm: clk: fixed: Update to support livetree	2017-06-01 07:03:14 -06:00
clk_pic32.c	dm: core: Replace of_offset with accessor	2017-02-08 06:12:14 -07:00
clk_sandbox.c	clk: sandbox: don't check clk ID against 0	2016-06-24 17:24:35 -04:00
clk_sandbox_test.c	clk: convert API to match reset/mailbox style	2016-06-19 17:05:55 -06:00
clk_stm32f7.c	clk: Modify xlate() method for livetree	2017-06-01 07:03:14 -06:00
clk_zynq.c	dm: clk: Update uclass to support livetree	2017-06-01 07:03:14 -06:00
clk_zynqmp.c	dm: Use dm.h header when driver mode is used	2017-06-01 06:57:52 -06:00
Kconfig	dm: clk: add BCM6345 clock driver	2017-05-10 16:16:09 +02:00
Makefile	dm: clk: add BCM6345 clock driver	2017-05-10 16:16:09 +02:00