mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-18 02:38:56 +00:00
a27278f054
Enable both of these commands in Xilinx SoCs to be able to use them in boot scripts. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1a612be7e09e9bc502f30e1f025441ccf8accba5.1661340513.git.michal.simek@amd.com
99 lines
2.4 KiB
Text
99 lines
2.4 KiB
Text
CONFIG_MICROBLAZE=y
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CONFIG_SYS_TEXT_BASE=0x29000000
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CONFIG_SYS_MALLOC_LEN=0xc0000
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CONFIG_SYS_MALLOC_F_LEN=0x400
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_ENV_SIZE=0x20000
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CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic"
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CONFIG_SYS_PROMPT="U-Boot-mONStR> "
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CONFIG_SPL_SERIAL=y
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CONFIG_SPL=y
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CONFIG_SYS_LOAD_ADDR=0x0
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CONFIG_TARGET_MICROBLAZE_GENERIC=y
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CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
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CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1
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CONFIG_XILINX_MICROBLAZE0_USE_DIV=1
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CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_REMAKE_ELF=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_BOOTDELAY=-1
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="root=romfs"
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CONFIG_USE_PREBOOT=y
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CONFIG_PREBOOT="echo U-BOOT for ${hostname};setenv preboot;echo"
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CONFIG_SYS_CONSOLE_IS_IN_ENV=y
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CONFIG_DISPLAY_BOARDINFO=y
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CONFIG_DISPLAY_BOARDINFO_LATE=y
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CONFIG_SPL_FOOTPRINT_LIMIT=y
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CONFIG_SPL_MAX_FOOTPRINT=0xffb00
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CONFIG_SPL_BOARD_INIT=y
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CONFIG_SPL_SYS_MALLOC_SIMPLE=y
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# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
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CONFIG_SPL_STACK=0x100000
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CONFIG_SPL_NOR_SUPPORT=y
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CONFIG_SPL_OS_BOOT=y
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CONFIG_SYS_SPL_ARGS_ADDR=0x2a000000
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CONFIG_SYS_OS_BASE=0x2c060000
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CONFIG_SYS_MAXARGS=15
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CONFIG_SYS_CBSIZE=512
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CONFIG_SYS_PBSIZE=544
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CONFIG_SYS_BOOTM_LEN=0x4000000
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CONFIG_CMD_IMLS=y
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CONFIG_CMD_SPL=y
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CONFIG_CMD_ASKENV=y
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CONFIG_CMD_GREPENV=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_SAVES=y
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CONFIG_BOOTP_BOOTFILESIZE=y
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CONFIG_CMD_TFTPPUT=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_JFFS2=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_EMBED=y
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CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_NETCONSOLE=y
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CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
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CONFIG_SPL_DM=y
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CONFIG_XILINX_GPIO=y
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CONFIG_DM_I2C=y
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CONFIG_LED=y
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CONFIG_LED_GPIO=y
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CONFIG_MTD=y
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CONFIG_DM_MTD=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_CFI_FLASH=y
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CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
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CONFIG_SYS_FLASH_EMPTY_INFO=y
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CONFIG_FLASH_CFI_MTD=y
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CONFIG_SYS_FLASH_PROTECTION=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_SYS_MAX_FLASH_SECT=2048
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CONFIG_SPI_FLASH_ISSI=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_SPI_FLASH_SST=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_PHY_ATHEROS=y
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CONFIG_PHY_BROADCOM=y
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CONFIG_PHY_DAVICOM=y
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CONFIG_PHY_LXT=y
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CONFIG_PHY_MARVELL=y
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CONFIG_PHY_MICREL=y
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CONFIG_PHY_MICREL_KSZ90X1=y
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CONFIG_PHY_NATSEMI=y
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CONFIG_PHY_REALTEK=y
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CONFIG_PHY_VITESSE=y
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CONFIG_DM_ETH_PHY=y
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CONFIG_XILINX_AXIEMAC=y
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CONFIG_XILINX_EMACLITE=y
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CONFIG_SYS_NS16550=y
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CONFIG_XILINX_UARTLITE=y
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CONFIG_XILINX_SPI=y
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CONFIG_SYSRESET_GPIO=y
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CONFIG_SYSRESET_MICROBLAZE=y
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CONFIG_WDT=y
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CONFIG_XILINX_TB_WATCHDOG=y
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