mirror of
https://github.com/AsahiLinux/u-boot
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d707e5b713
Make it similar to the code in mips{32,64}/start.S, in order to
allow further unifications.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
179 lines
3.3 KiB
ArmAsm
179 lines
3.3 KiB
ArmAsm
/*
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* Startup Code for MIPS32 XBURST CPU-core
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*
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* Copyright (c) 2010 Xiangfu Liu <xiangfu@sharism.cc>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <config.h>
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#include <version.h>
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#include <asm/regdef.h>
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#include <asm/mipsregs.h>
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#include <asm/addrspace.h>
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#include <asm/cacheops.h>
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.set noreorder
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.globl _start
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.text
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_start:
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/* Initialize $gp */
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bal 1f
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nop
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.word _gp
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1:
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lw gp, 0(ra)
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/* Set up temporary stack */
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li sp, CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET
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la t9, board_init_f
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jr t9
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nop
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/*
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* void relocate_code (addr_sp, gd, addr_moni)
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*
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* This "function" does not return, instead it continues in RAM
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* after relocating the monitor code.
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*
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* a0 = addr_sp
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* a1 = gd
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* a2 = destination address
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*/
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.globl relocate_code
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.ent relocate_code
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relocate_code:
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move sp, a0 # set new stack pointer
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move s0, a1 # save gd in s0
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move s2, a2 # save destination address in s2
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li t0, CONFIG_SYS_MONITOR_BASE
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sub s1, s2, t0 # s1 <-- relocation offset
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la t3, in_ram
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lw t2, -12(t3) # t2 <-- __image_copy_end
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move t1, a2
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add gp, s1 # adjust gp
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/*
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* t0 = source address
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* t1 = target address
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* t2 = source end address
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*/
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1:
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lw t3, 0(t0)
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sw t3, 0(t1)
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addu t0, 4
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blt t0, t2, 1b
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addu t1, 4
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/* If caches were enabled, we would have to flush them here. */
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/* flush d-cache */
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li t0, KSEG0
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addi t1, t0, CONFIG_SYS_DCACHE_SIZE
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2:
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cache INDEX_WRITEBACK_INV_D, 0(t0)
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bne t0, t1, 2b
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addi t0, CONFIG_SYS_CACHELINE_SIZE
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sync
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/* flush i-cache */
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li t0, KSEG0
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addi t1, t0, CONFIG_SYS_ICACHE_SIZE
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3:
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cache INDEX_INVALIDATE_I, 0(t0)
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bne t0, t1, 3b
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addi t0, CONFIG_SYS_CACHELINE_SIZE
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/* Invalidate BTB */
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mfc0 t0, CP0_CONFIG, 7
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nop
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ori t0, 2
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mtc0 t0, CP0_CONFIG, 7
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nop
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/* Jump to where we've relocated ourselves */
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addi t0, s2, in_ram - _start
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jr t0
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nop
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.word __rel_dyn_end
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.word __rel_dyn_start
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.word __image_copy_end
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.word _GLOBAL_OFFSET_TABLE_
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.word num_got_entries
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in_ram:
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/*
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* Now we want to update GOT.
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*
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* GOT[0] is reserved. GOT[1] is also reserved for the dynamic object
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* generated by GNU ld. Skip these reserved entries from relocation.
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*/
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lw t3, -4(t0) # t3 <-- num_got_entries
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lw t8, -8(t0) # t8 <-- _GLOBAL_OFFSET_TABLE_
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add t8, s1 # t8 now holds relocated _G_O_T_
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addi t8, t8, 8 # skipping first two entries
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li t2, 2
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1:
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lw t1, 0(t8)
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beqz t1, 2f
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add t1, s1
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sw t1, 0(t8)
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2:
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addi t2, 1
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blt t2, t3, 1b
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addi t8, 4
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/* Update dynamic relocations */
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lw t1, -16(t0) # t1 <-- __rel_dyn_start
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lw t2, -20(t0) # t2 <-- __rel_dyn_end
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b 2f # skip first reserved entry
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addi t1, 8
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1:
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lw t8, -4(t1) # t8 <-- relocation info
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li t3, 3
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bne t8, t3, 2f # skip non R_MIPS_REL32 entries
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nop
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lw t3, -8(t1) # t3 <-- location to fix up in FLASH
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lw t8, 0(t3) # t8 <-- original pointer
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add t8, s1 # t8 <-- adjusted pointer
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add t3, s1 # t3 <-- location to fix up in RAM
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sw t8, 0(t3)
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2:
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blt t1, t2, 1b
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addi t1, 8 # each rel.dyn entry is 8 bytes
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/*
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* Clear BSS
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*
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* GOT is now relocated. Thus __bss_start and __bss_end can be
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* accessed directly via $gp.
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*/
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la t1, __bss_start # t1 <-- __bss_start
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la t2, __bss_end # t2 <-- __bss_end
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1:
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sw zero, 0(t1)
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blt t1, t2, 1b
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addi t1, 4
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move a0, s0 # a0 <-- gd
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la t9, board_init_r
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jr t9
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move a1, s2
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.end relocate_code
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