mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-09-29 19:02:12 +00:00
c79cbb5952
If for some reason, TSC timer frequency cannot be determined from hardware, nor is it specified in the device tree, U-Boot will panic resulting in endless reset during boot. Let's define a default TSC timer frequency using the Kconfig value CONFIG_X86_TSC_TIMER_FREQ (note: #include must be used instead of /include/ otherwise the macro is not pre-processed). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
47 lines
703 B
Text
47 lines
703 B
Text
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
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*
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* Generic coreboot payload device tree for x86 targets
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*/
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/dts-v1/;
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/include/ "skeleton.dtsi"
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/include/ "keyboard.dtsi"
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/include/ "pcspkr.dtsi"
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/include/ "reset.dtsi"
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/include/ "rtc.dtsi"
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#include "tsc_timer.dtsi"
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/ {
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model = "coreboot x86 payload";
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compatible = "coreboot,x86-payload";
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aliases {
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serial0 = &serial;
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};
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config {
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silent_console = <0>;
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};
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chosen {
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stdout-path = "/serial";
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};
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pci {
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compatible = "pci-x86";
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u-boot,dm-pre-reloc;
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};
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serial: serial {
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u-boot,dm-pre-reloc;
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compatible = "coreboot-serial";
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};
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coreboot-fb {
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compatible = "coreboot-fb";
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};
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};
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