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d7dd358f93
The Armada8k implements 2 CPs (communication processors) and the 2nd CP also is equipped with a COMPHY controller. This patch now loops over all enabled MISC devices (CP110) enabled in the DT to initialize all CPs. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> |
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.. | ||
armada8k | ||
armada3700 | ||
include/mach | ||
serdes | ||
arm64-common.c | ||
cpu.c | ||
dram.c | ||
gpio.c | ||
Kconfig | ||
lowlevel_spl.S | ||
Makefile | ||
mbus.c | ||
sata.c | ||
spl.c | ||
timer.c |