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u-boot/arch/arm/mach-socfpga/include/mach
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Ley Foon Tan 177ba1f927 arm: socfpga: Add clock driver for Arria 10 
Add clock driver support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-05-18 11:33:17 +02:00
..
base_addr_a10.h arm: socfpga: Add A10 macros 2017-05-18 11:33:17 +02:00
base_addr_ac5.h ARM: socfpga: rename the cyclone5 and arria5 base address file 2015-11-30 13:30:19 +01:00
boot0.h ARM: socfpga: boot0 hook: remove macro from boot0 header file 2017-04-14 14:06:42 +02:00
clock_manager.h arm: socfpga: Add clock driver for Arria 10 2017-05-18 11:33:17 +02:00
clock_manager_arria10.h arm: socfpga: Add clock driver for Arria 10 2017-05-18 11:33:17 +02:00
clock_manager_gen5.h arm: socfpga: Restructure clock manager driver 2017-05-18 11:33:16 +02:00
fpga_manager.h
freeze_controller.h
gpio.h
misc.h arm: socfpga: Restructure misc driver 2017-05-18 11:33:17 +02:00
nic301.h
reset_manager.h arm: socfpga: Add reset driver support for Arria 10 2017-05-18 11:33:17 +02:00
reset_manager_arria10.h arm: socfpga: Add reset driver support for Arria 10 2017-05-18 11:33:17 +02:00
reset_manager_gen5.h arm: socfpga: Restructure reset manager driver 2017-05-18 11:33:17 +02:00
scan_manager.h arm: socfpga: scan: Add code to get FPGA ID 2015-08-08 14:14:30 +02:00
scu.h
sdram.h ddr: altera: Configuring SDRAM extra cycles timing parameters 2016-10-27 08:03:07 +02:00
system_manager.h arm: socfpga: Restructure system manager 2017-05-18 11:33:17 +02:00
system_manager_gen5.h arm: socfpga: Restructure system manager 2017-05-18 11:33:17 +02:00
timer.h