u-boot/arch/arm/mach-mvebu
Pali Rohár 1fd54253bc arm: a37xx: pci: Fix a3700_fdt_fix_pcie_regions() function again
The a3700_fdt_fix_pcie_regions() function still computes nonsense.

It computes the fixup offset from the PCI address taken from the first
row of the "ranges" array, which means that:
- PCI address must equal CPU address (otherwise the computed fix offset
  will be wrong),
- the first row must contain the lowest address.

This is the case for the default device-tree, which is why we didn't
notice it.

It also adds the fixup offset to all PCI and CPU addresses, which is
wrong.

Instead:
1) The fixup offset must be computed from the CPU address, not PCI
   address.

2) The fixup offset must be computed from the row containing the lowest
   CPU address, which is not necessarily contained in the first row.

3) The PCI address - the address to which the PCIe controller remaps the
   address space as seen from the point of view of the PCIe device -
   must be fixed by the fix offset in the same way as the CPU address
   only in the special case when the CPU adn PCI addresses are the same.
   Same addresses means that remapping is disabled, and thus if we
   change the CPU address, we need also to change the PCI address so
   that the remapping is still disabled afterwards.

Consider an example:
  The ranges entries contain:
    PCI address   CPU address
    70000000      EA000000
    E9000000      E9000000
    EB000000      EB000000

  By default CPU PCIe window is at:        E8000000 - F0000000
  Consider the case when TF-A moves it to: F2000000 - FA000000

  Until now the function would take the PCI address of the first entry:
  70000000, and the new base, F2000000, to compute the fix offset:
  F2000000 - 70000000 = 82000000, and then add 8200000 to all addresses,
  resulting in
    PCI address   CPU address
    F2000000      6C000000
    6B000000      6B000000
    6D000000      6D000000
  which is complete nonsense - none of the CPU addresses is in the
  requested window.

  Now it will take the lowest CPU address, which is in second row,
  E9000000, and compute the fix offset F2000000 - E9000000 = 09000000,
  and then add it to all CPU addresses and those PCI addresses which
  equal to their corresponding CPU addresses, resulting in
    PCI address   CPU address
    70000000      F3000000
    F2000000      F2000000
    F4000000      F4000000
  where all of the CPU addresses are in the needed window.

Fixes: 4a82fca8e3 ("arm: a37xx: pci: Fix a3700_fdt_fix_pcie_regions() function")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-04 08:38:05 +01:00
..
armada8k arm64: mvebu: extend the mmio region 2021-05-16 06:48:45 +02:00
armada3700 arm: a37xx: pci: Fix a3700_fdt_fix_pcie_regions() function again 2022-03-04 08:38:05 +01:00
include/mach pci: pci_mvebu: Fix PCIe MEM and IO resources assignment and mbus mapping 2022-01-14 07:47:57 +01:00
serdes arm: mvebu: a38x: serdes: Move non-serdes PCIe code to pci_mvebu.c 2022-01-14 07:47:57 +01:00
.gitignore mvebu: select boot device at SoC level 2018-08-06 14:07:23 +02:00
arm64-common.c pci: arm: mvebu: Drop DM_PCI check from arch_early_init_r 2021-08-06 08:20:45 -04:00
cpu.c Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell 2021-09-01 10:11:21 -04:00
dram.c common: Drop asm/global_data.h from common header 2021-02-02 15:33:42 -05:00
efuse.c common: Drop linux/bitops.h from common header 2020-05-18 21:19:23 -04:00
gpio.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
Kconfig arm: mvebu: spl: Add option to reset the board on DDR training failure 2022-02-17 14:17:07 +01:00
kwbimage.cfg.in arm: mvebu: Enable BootROM output on A38x 2022-01-14 11:39:16 +01:00
lowlevel_spl.S arm: mvebu: Add documentation for save_boot_params() function 2021-10-28 10:33:32 +02:00
Makefile arm: mvebu: Enable BootROM output on A38x 2022-01-14 11:39:16 +01:00
mbus.c treewide: Convert macro and uses of __section(foo) to __section("foo") 2021-05-24 14:21:30 -04:00
spl.c arm: mvebu: spl: Add option to reset the board on DDR training failure 2022-02-17 14:17:07 +01:00
system-controller.c arm: mvebu: Implement simple mvebu-reset driver for enabling/disabling PCIe ports 2022-01-14 07:47:57 +01:00
timer.c treewide: Convert macro and uses of __section(foo) to __section("foo") 2021-05-24 14:21:30 -04:00