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https://github.com/AsahiLinux/u-boot
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830b94f768
The SDHI nodes are not in Linux 4.17 DTs in M3N, pull them into U-Boot specific DT extras until they hit mainline Linux, to make syncing of DTs easier. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
121 lines
2.9 KiB
Text
121 lines
2.9 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source extras for U-Boot on RCar R8A77965 SoC
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*
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* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
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*/
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#include "r8a779x-u-boot.dtsi"
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&extalr_clk {
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u-boot,dm-pre-reloc;
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};
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&soc {
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rpc: rpc@0xee200000 {
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compatible = "renesas,rpc-r8a77965", "renesas,rpc";
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reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
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clocks = <&cpg CPG_MOD 917>;
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bank-width = <2>;
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status = "disabled";
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};
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sdhi0: sd@ee100000 {
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compatible = "renesas,sdhi-r8a77965";
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reg = <0 0xee100000 0 0x2000>;
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interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 314>;
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max-frequency = <200000000>;
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power-domains = <&sysc 32>;
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resets = <&cpg 314>;
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status = "disabled";
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};
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sdhi1: sd@ee120000 {
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compatible = "renesas,sdhi-r8a77965";
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reg = <0 0xee120000 0 0x2000>;
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interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 313>;
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max-frequency = <200000000>;
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power-domains = <&sysc 32>;
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resets = <&cpg 313>;
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status = "disabled";
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};
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sdhi2: sd@ee140000 {
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compatible = "renesas,sdhi-r8a77965";
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reg = <0 0xee140000 0 0x2000>;
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interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 312>;
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max-frequency = <200000000>;
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power-domains = <&sysc 32>;
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resets = <&cpg 312>;
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status = "disabled";
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};
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sdhi3: sd@ee160000 {
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compatible = "renesas,sdhi-r8a77965";
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reg = <0 0xee160000 0 0x2000>;
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interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 311>;
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max-frequency = <200000000>;
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power-domains = <&sysc 32>;
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resets = <&cpg 311>;
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status = "disabled";
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};
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ehci0: usb@ee080100 {
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compatible = "generic-ehci";
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reg = <0 0xee080100 0 0x100>;
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interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 703>;
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phys = <&usb2_phy0>;
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phy-names = "usb";
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companion= <&ohci0>;
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power-domains = <&sysc 32>;
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resets = <&cpg 703>;
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};
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usb2_phy0: usb-phy@ee080200 {
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compatible = "renesas,usb2-phy-r8a77965",
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"renesas,rcar-gen3-usb2-phy";
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reg = <0 0xee080200 0 0x700>;
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interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 703>;
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power-domains = <&sysc 32>;
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resets = <&cpg 703>;
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#phy-cells = <0>;
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};
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ehci1: usb@ee0a0100 {
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compatible = "generic-ehci";
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reg = <0 0xee0a0100 0 0x100>;
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interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 702>;
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phys = <&usb2_phy1>;
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phy-names = "usb";
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companion= <&ohci1>;
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power-domains = <&sysc 32>;
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resets = <&cpg 702>;
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};
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usb2_phy1: usb-phy@ee0a0200 {
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compatible = "renesas,usb2-phy-r8a77965",
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"renesas,rcar-gen3-usb2-phy";
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reg = <0 0xee0a0200 0 0x700>;
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clocks = <&cpg CPG_MOD 702>;
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power-domains = <&sysc 32>;
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resets = <&cpg 702>;
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#phy-cells = <0>;
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};
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xhci0: usb@ee000000 {
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compatible = "renesas,xhci-r8a77965",
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"renesas,rcar-gen3-xhci";
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reg = <0 0xee000000 0 0xc00>;
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interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 328>;
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power-domains = <&sysc 32>;
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resets = <&cpg 328>;
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};
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};
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