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33f19038cc
A board with Hi3798MV200 SoC and various peripherals. Details are in the board README.md. Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
225 lines
5.5 KiB
Text
225 lines
5.5 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* DTS File for HiSilicon Hi3798mv200 SoC.
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*
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* Released under the GPLv2 only.
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*/
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#include <dt-bindings/clock/histb-clock.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/phy/phy.h>
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#include <dt-bindings/reset/ti-syscon.h>
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/ {
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compatible = "hisilicon,hi3798mv200";
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interrupt-parent = <&gic>;
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#address-cells = <2>;
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#size-cells = <2>;
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psci {
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compatible = "arm,psci-0.2";
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method = "smc";
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};
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cpus {
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#address-cells = <2>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,cortex-a53";
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device_type = "cpu";
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reg = <0x0 0x0>;
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enable-method = "psci";
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};
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cpu@1 {
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compatible = "arm,cortex-a53";
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device_type = "cpu";
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reg = <0x0 0x1>;
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enable-method = "psci";
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};
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cpu@2 {
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compatible = "arm,cortex-a53";
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device_type = "cpu";
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reg = <0x0 0x2>;
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enable-method = "psci";
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};
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cpu@3 {
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compatible = "arm,cortex-a53";
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device_type = "cpu";
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reg = <0x0 0x3>;
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enable-method = "psci";
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};
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};
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gic: interrupt-controller@f1001000 {
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compatible = "arm,gic-400";
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reg = <0x0 0xf1001000 0x0 0x1000>, /* GICD */
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<0x0 0xf1002000 0x0 0x100>; /* GICC */
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#address-cells = <0>;
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#interrupt-cells = <3>;
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interrupt-controller;
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
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IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
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IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
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IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
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IRQ_TYPE_LEVEL_LOW)>;
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};
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/* Initialization is done in boot loader */
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usb2_phy1: hsusb1_phy {
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compatible = "usb-nop-xceiv";
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clocks = <&crg HISTB_USB2_PHY1_REF_CLK>;
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clock-names = "main";
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#phy-cells = <0>;
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};
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soc: soc@f0000000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x0 0xf0000000 0x10000000>;
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crg: clock-reset-controller@8a22000 {
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compatible = "hisilicon,hi3798mv200-crg", "syscon", "simple-mfd";
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reg = <0x8a22000 0x1000>;
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#clock-cells = <1>;
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#reset-cells = <2>;
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};
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sysctrl: system-controller@8000000 {
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compatible = "hisilicon,hi3798mv200-sysctrl", "syscon";
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reg = <0x8000000 0x1000>;
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#clock-cells = <1>;
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#reset-cells = <2>;
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};
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perictrl: peripheral-controller@8a20000 {
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compatible = "hisilicon,hi3798mv200-perictrl", "syscon",
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"simple-mfd";
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reg = <0x8a20000 0x1000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x8a20000 0x1000>;
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combphy0: phy@850 {
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compatible = "hisilicon,hi3798mv200-combphy";
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reg = <0x850 0x8>;
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#phy-cells = <1>;
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clocks = <&crg HISTB_COMBPHY0_CLK>;
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resets = <&crg 0x188 4>;
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assigned-clocks = <&crg HISTB_COMBPHY0_CLK>;
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assigned-clock-rates = <100000000>;
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hisilicon,fixed-mode = <PHY_TYPE_USB3>;
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};
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};
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pmx0: pinconf@8a21000 {
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compatible = "pinconf-single";
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reg = <0x8a21000 0x180>;
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pinctrl-single,register-width = <32>;
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pinctrl-single,function-mask = <7>;
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};
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uart0: serial@8b00000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x8b00000 0x1000>;
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interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&sysctrl HISTB_UART0_CLK>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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sd0: mmc@9820000 {
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compatible = "snps,dw-mshc";
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reg = <0x9820000 0x10000>;
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interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&crg HISTB_SDIO0_CIU_CLK>,
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<&crg HISTB_SDIO0_BIU_CLK>;
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clock-names = "ciu", "biu";
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resets = <&crg 0x9c 4>;
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reset-names = "reset";
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status = "disabled";
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};
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emmc: mmc@9830000 {
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compatible = "hisilicon,hi3798mv200-dw-mshc";
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reg = <0x9830000 0x10000>;
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interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&crg HISTB_MMC_CIU_CLK>,
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<&crg HISTB_MMC_BIU_CLK>,
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<&crg HISTB_MMC_SAMPLE_CLK>,
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<&crg HISTB_MMC_DRV_CLK>;
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clock-names = "ciu", "biu", "ciu-sample", "ciu-drive";
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resets = <&crg 0xa0 4>;
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reset-names = "reset";
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status = "disabled";
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};
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gmac: ethernet@9840000 {
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compatible = "hisilicon,hi3798mv200-gmac", "hisilicon,hisi-gmac-v2";
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reg = <0x9840000 0x1000>,
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<0x984300c 0x4>;
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interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&crg HISTB_ETH0_MAC_CLK>,
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<&crg HISTB_ETH0_MACIF_CLK>;
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clock-names = "mac_core", "mac_ifc";
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resets = <&crg 0xcc 0>,
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<&crg 0xcc 2>,
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<&crg 0xcc 5>;
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reset-names = "mac_core", "mac_ifc", "phy";
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status = "disabled";
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};
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ohci: ohci@9880000 {
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compatible = "generic-ohci";
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reg = <0x9880000 0x10000>;
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interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&crg HISTB_USB2_BUS_CLK>,
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<&crg HISTB_USB2_12M_CLK>,
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<&crg HISTB_USB2_48M_CLK>;
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clock-names = "bus", "clk12", "clk48";
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resets = <&crg 0xb8 12>;
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reset-names = "bus";
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status = "disabled";
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};
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ehci: ehci@9890000 {
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compatible = "generic-ehci";
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reg = <0x9890000 0x10000>;
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interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&crg HISTB_USB2_BUS_CLK>,
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<&crg HISTB_USB2_PHY_CLK>,
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<&crg HISTB_USB2_UTMI_CLK>;
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clock-names = "bus", "phy", "utmi";
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resets = <&crg 0xb8 12>,
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<&crg 0xb8 16>,
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<&crg 0xb8 13>;
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reset-names = "bus", "phy", "utmi";
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phys = <&usb2_phy1>;
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phy-names = "usb";
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status = "disabled";
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};
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sd1: mmc@9c40000 {
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compatible = "snps,dw-mshc";
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reg = <0x9c40000 0x10000>;
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interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&crg HISTB_SDIO1_CIU_CLK>,
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<&crg HISTB_SDIO1_BIU_CLK>;
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clock-names = "ciu", "biu";
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resets = <&crg 0x28c 4>;
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reset-names = "reset";
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status = "disabled";
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};
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};
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};
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