u-boot/arch/arm/include/asm/arch-rockchip/boot0.h
Kever Yang cee7470cd8 rockchip: boot0: align to 0x20 for armv7 '_start'
The '_start' is using as vector table base address, and will write
to VBAR register, so it needs to be aligned to 0x20 for armv7.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
[Updated to current code base:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-21 23:57:21 +01:00

42 lines
1.4 KiB
C

/*
* Copyright 2017 Theobroma Systems Design und Consulting GmbH
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*
* Execution starts on the instruction following this 4-byte header
* (containing the magic 'RK30', 'RK31', 'RK32' or 'RK33'). This
* magic constant will be written into the final image by the rkimage
* tool, but we need to reserve space for it here.
*
* To make life easier for everyone, we build the SPL binary with
* space for this 4-byte header already included in the binary.
*/
#ifdef CONFIG_SPL_BUILD
/*
* We need to add 4 bytes of space for the 'RK33' at the
* beginning of the executable. However, as we want to keep
* this generic and make it applicable to builds that are like
* the RK3368 (TPL needs this, SPL doesn't) or the RK3399 (no
* TPL, but extra space needed in the SPL), we simply repeat
* the 'b reset' with the expectation that the first one will
* be overwritten, if this is the first stage contained in the
* final image created with mkimage)...
*/
b reset /* may be overwritten --- should be 'nop' or a 'b reset' */
#endif
b reset
#if !defined(CONFIG_ARM64)
/*
* For armv7, the addr '_start' will used as vector start address
* and write to VBAR register, which needs to aligned to 0x20.
*/
.align(5)
_start:
ARM_VECTORS
#endif
#if defined(CONFIG_ROCKCHIP_RK3399) && defined(CONFIG_SPL_BUILD)
.space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM /* space for the ATF data */
#endif