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cee7470cd8
The '_start' is using as vector table base address, and will write to VBAR register, so it needs to be aligned to 0x20 for armv7. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> [Updated to current code base:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
42 lines
1.4 KiB
C
42 lines
1.4 KiB
C
/*
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* Copyright 2017 Theobroma Systems Design und Consulting GmbH
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/*
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* Execution starts on the instruction following this 4-byte header
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* (containing the magic 'RK30', 'RK31', 'RK32' or 'RK33'). This
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* magic constant will be written into the final image by the rkimage
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* tool, but we need to reserve space for it here.
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*
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* To make life easier for everyone, we build the SPL binary with
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* space for this 4-byte header already included in the binary.
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*/
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#ifdef CONFIG_SPL_BUILD
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/*
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* We need to add 4 bytes of space for the 'RK33' at the
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* beginning of the executable. However, as we want to keep
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* this generic and make it applicable to builds that are like
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* the RK3368 (TPL needs this, SPL doesn't) or the RK3399 (no
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* TPL, but extra space needed in the SPL), we simply repeat
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* the 'b reset' with the expectation that the first one will
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* be overwritten, if this is the first stage contained in the
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* final image created with mkimage)...
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*/
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b reset /* may be overwritten --- should be 'nop' or a 'b reset' */
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#endif
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b reset
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#if !defined(CONFIG_ARM64)
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/*
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* For armv7, the addr '_start' will used as vector start address
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* and write to VBAR register, which needs to aligned to 0x20.
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*/
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.align(5)
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_start:
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ARM_VECTORS
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#endif
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#if defined(CONFIG_ROCKCHIP_RK3399) && defined(CONFIG_SPL_BUILD)
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.space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM /* space for the ATF data */
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#endif
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