Lokesh Vutla 166e5cc627 arm: omap: emif: Fix DDR3 init after warm reset ... EMIF supports a global warm reset mode, during which the EMIF keeps the SDRAM content. But if leveling is enabled at the time of warm reset for DDR3, the following steps needs to be done after warm reset: 1) Keep EMIF in self refresh mode. 2) Reset PHY to bring back the PHY to a known state. 3) Start Levelling procedure. Doing the same. And also enabling DLL lock and code output after warm reset. Tested on OMAP5432 ES2.0 Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>		2013-05-10 08:25:55 -04:00
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boot-common.c	omap_hsmmc: add driver check for write protection	2013-03-08 16:41:13 -05:00
clocks-common.c	OMAP: Fix copy-paste bug that did not enable UART4 clock	2013-04-08 11:29:05 -04:00
config.mk	arm: Remove additional config flags	2012-10-04 14:51:50 +02:00
emif-common.c	arm: omap: emif: Fix DDR3 init after warm reset	2013-05-10 08:25:55 -04:00
hwinit-common.c	ARM: mmu: Set domain permissions to client access	2013-03-28 09:10:58 +01:00
lowlevel_init.S	OMAP3/4/5/AM33xx: Correct logic for checking FAT or RAW MMC	2013-04-08 11:29:34 -04:00
Makefile	ti814x_evm: add ti814x evm board support	2013-03-24 12:49:12 -04:00
mem-common.c	omap4: make omap4 code common for future reuse	2011-11-15 22:25:50 +01:00
reset.c	ARM: OMAP3+: Detect reset type	2012-07-07 14:07:34 +02:00
timer.c	am33xx: Add required includes to some omap/am33xx code	2013-03-24 12:49:11 -04:00
u-boot-spl.lds	arm: Make all linker scripts compatible with per-symbol sections	2013-04-12 07:55:09 +02:00
utils.c	omap4: calculate EMIF register values	2011-08-03 12:49:19 +02:00
vc.c	ARM: OMAP4+: Change the PRCM structure prototype common for all Socs	2013-03-11 11:06:09 -04:00