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https://github.com/AsahiLinux/u-boot
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842033e696
The pci_indirect.c file is always compiled when CONFIG_PCI is defined although the indirect PCI bridge support is not needed by every board. Introduce a new CONFIG_PCI_INDIRECT_BRIDGE config option and only compile indirect PCI bridge support if this options is enabled. Also add the new option into the configuration files of the boards which needs that. Compile tested for powerpc, x86, arm and nds32. MAKEALL results: powerpc: --------------------- SUMMARY ---------------------------- Boards compiled: 641 Boards with warnings but no errors: 2 ( ELPPC MPC8323ERDB ) ---------------------------------------------------------- Note: the warnings for ELPPC and MPC8323ERDB are present even without the actual patch. x86: --------------------- SUMMARY ---------------------------- Boards compiled: 1 ---------------------------------------------------------- arm: --------------------- SUMMARY ---------------------------- Boards compiled: 311 ---------------------------------------------------------- nds32: --------------------- SUMMARY ---------------------------- Boards compiled: 3 ---------------------------------------------------------- Cc: Tom Rini <trini@ti.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
191 lines
7.7 KiB
C
191 lines
7.7 KiB
C
/*
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* (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/************************************************************************
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* board/config_EBONY.h - configuration for AMCC 440GP Ref (Ebony)
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***********************************************************************/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*-----------------------------------------------------------------------
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* High Level Configuration Options
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*----------------------------------------------------------------------*/
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#define CONFIG_EBONY 1 /* Board is ebony */
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#define CONFIG_440GP 1 /* Specifc GP support */
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#define CONFIG_440 1 /* ... PPC440 family */
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#define CONFIG_4xx 1 /* ... PPC4xx family */
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#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
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#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
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#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
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/*
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* Include common defines/options for all AMCC eval boards
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*/
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#define CONFIG_HOSTNAME ebony
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#include "amcc-common.h"
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/*
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* Define here the location of the environment variables (FLASH or NVRAM).
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* Note: DENX encourages to use redundant environment in FLASH. NVRAM is only
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* supported for backward compatibility.
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*/
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#if 1
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#define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
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#else
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#define CONFIG_ENV_IS_IN_NVRAM 1 /* use NVRAM for environment vars */
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#endif
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/*-----------------------------------------------------------------------
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* Base addresses -- Note these are effective addresses where the
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* actual resources get mapped (not physical addresses)
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*----------------------------------------------------------------------*/
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#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */
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#define CONFIG_SYS_FLASH_BASE 0xff800000 /* start of FLASH */
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#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
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#define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
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#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
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#define CONFIG_SYS_NVRAM_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x08000000)
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#define CONFIG_SYS_FPGA_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x08300000)
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/*-----------------------------------------------------------------------
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* Initial RAM & stack pointer (placed in internal SRAM)
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*----------------------------------------------------------------------*/
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#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE /* Initial RAM address */
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#define CONFIG_SYS_INIT_RAM_SIZE 0x2000 /* Size of used area in RAM */
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#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
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/*-----------------------------------------------------------------------
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* Serial Port
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*----------------------------------------------------------------------*/
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#define CONFIG_CONS_INDEX 1 /* Use UART0 */
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#define CONFIG_SYS_EXT_SERIAL_CLOCK (1843200 * 6) /* Ext clk @ 11.059 MHz */
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/*-----------------------------------------------------------------------
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* NVRAM/RTC
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*
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* NOTE: Upper 8 bytes of NVRAM is where the RTC registers are located.
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* The DS1743 code assumes this condition (i.e. -- it assumes the base
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* address for the RTC registers is:
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*
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* CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE
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*
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*----------------------------------------------------------------------*/
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#define CONFIG_SYS_NVRAM_SIZE (0x2000 - 8) /* NVRAM size(8k)- RTC regs */
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#define CONFIG_RTC_DS174x 1 /* DS1743 RTC */
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#ifdef CONFIG_ENV_IS_IN_NVRAM
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#define CONFIG_ENV_SIZE 0x1000 /* Size of Environment vars */
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#define CONFIG_ENV_ADDR \
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(CONFIG_SYS_NVRAM_BASE_ADDR+CONFIG_SYS_NVRAM_SIZE-CONFIG_ENV_SIZE)
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#endif /* CONFIG_ENV_IS_IN_NVRAM */
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/*-----------------------------------------------------------------------
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* FLASH related
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*----------------------------------------------------------------------*/
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#define CONFIG_SYS_MAX_FLASH_BANKS 3 /* number of banks */
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#define CONFIG_SYS_MAX_FLASH_SECT 32 /* sectors per device */
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#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
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#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
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#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
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#define CONFIG_SYS_FLASH_ADDR0 0x5555
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#define CONFIG_SYS_FLASH_ADDR1 0x2aaa
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#define CONFIG_SYS_FLASH_WORD_SIZE unsigned char
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#ifdef CONFIG_ENV_IS_IN_FLASH
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#define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
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#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE-CONFIG_ENV_SECT_SIZE)
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#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
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/* Address and size of Redundant Environment Sector */
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#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
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#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
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#endif /* CONFIG_ENV_IS_IN_FLASH */
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/*-----------------------------------------------------------------------
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* DDR SDRAM
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*----------------------------------------------------------------------*/
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#define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */
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#define SPD_EEPROM_ADDRESS {0x53,0x52} /* SPD i2c spd addresses */
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#define CONFIG_PROG_SDRAM_TLB 1 /* setup SDRAM TLB's dynamically*/
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/*-----------------------------------------------------------------------
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* I2C
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*----------------------------------------------------------------------*/
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#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
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#define CONFIG_SYS_I2C_MULTI_EEPROMS
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#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
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/*
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* Default environment variables
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*/
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#define CONFIG_EXTRA_ENV_SETTINGS \
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CONFIG_AMCC_DEF_ENV \
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CONFIG_AMCC_DEF_ENV_POWERPC \
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CONFIG_AMCC_DEF_ENV_PPC_OLD \
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CONFIG_AMCC_DEF_ENV_NOR_UPD \
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"kernel_addr=ff800000\0" \
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"ramdisk_addr=ff810000\0" \
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""
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#define CONFIG_PHY_ADDR 8 /* PHY address */
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#define CONFIG_HAS_ETH0
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#define CONFIG_HAS_ETH1
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#define CONFIG_PHY1_ADDR 9 /* EMAC1 PHY address */
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/*
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* Commands additional to the ones defined in amcc-common.h
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*/
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#define CONFIG_CMD_DATE
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#define CONFIG_CMD_PCI
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#define CONFIG_CMD_SDRAM
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#define CONFIG_CMD_SNTP
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/*-----------------------------------------------------------------------
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* PCI stuff
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*-----------------------------------------------------------------------
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*/
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/* General PCI */
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#define CONFIG_PCI /* include pci support */
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#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
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#define CONFIG_PCI_PNP /* do pci plug-and-play */
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#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
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#define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */
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/* Board-specific PCI */
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#define CONFIG_SYS_PCI_TARGET_INIT /* let board init pci target */
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#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
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#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
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#endif /* __CONFIG_H */
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