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The ASUS Transformer T30 family are 2-in-1 detachable tablets and AiO developed by ASUS that run the Android operating system (TF600T runs Windows RT and P1801-T runs Android and Windows). The T30 Transformers feature a 10.1-inch display (apart P1801-T), an Nvidia Tegra 3 quad-core chip, 1/2 GB of RAM, and 16/32 GB of storage. Transformers board derives from Nvidia Cardhu development board. This patch brings support for 7 known Transformer devices: - ASUS Transformer Prime TF201 - ASUS Transformer Pad TF300T/TF300TG/TF300TL - ASUS VivoTab RT TF600T (Windows RT based) - ASUS Transformer Infinity TF700T - ASUS Portable AiO P1801-T Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # all devices Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
201 lines
5 KiB
C
201 lines
5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2010-2013
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* NVIDIA Corporation <www.nvidia.com>
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*
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* (C) Copyright 2021
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* Svyatoslav Ryhel <clamor95@gmail.com>
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*/
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/* T30 Transformers derive from Cardhu board */
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#include <common.h>
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#include <dm.h>
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#include <env.h>
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#include <fdt_support.h>
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#include <i2c.h>
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#include <log.h>
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#include <asm/arch/pinmux.h>
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#include <asm/arch/gp_padctrl.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch-tegra/fuse.h>
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#include <asm/gpio.h>
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#include <linux/delay.h>
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#include "pinmux-config-transformer.h"
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#define TPS65911_I2C_ADDRESS 0x2D
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#define TPS65911_VDD1 0x21
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#define TPS65911_VDD1_OP 0x22
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#define TPS65911_LDO1 0x30
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#define TPS65911_LDO2 0x31
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#define TPS65911_LDO3 0x37
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#define TPS65911_LDO5 0x32
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#define TPS65911_LDO6 0x35
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#define TPS65911_GPIO0 0x60
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#define TPS65911_GPIO6 0x66
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#define TPS65911_GPIO7 0x67
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#define TPS65911_GPIO8 0x68
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#define TPS65911_DEVCTRL 0x3F
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#define DEVCTRL_PWR_OFF_MASK BIT(7)
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#define DEVCTRL_DEV_ON_MASK BIT(2)
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#define DEVCTRL_DEV_OFF_MASK BIT(0)
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#ifdef CONFIG_CMD_POWEROFF
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int do_poweroff(struct cmd_tbl *cmdtp, int flag,
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int argc, char *const argv[])
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{
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struct udevice *dev;
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uchar data_buffer[1];
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int ret;
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ret = i2c_get_chip_for_busnum(0, TPS65911_I2C_ADDRESS, 1, &dev);
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if (ret) {
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log_debug("cannot find PMIC I2C chip\n");
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return 0;
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}
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ret = dm_i2c_read(dev, TPS65911_DEVCTRL, data_buffer, 1);
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if (ret)
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return ret;
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data_buffer[0] |= DEVCTRL_PWR_OFF_MASK;
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ret = dm_i2c_write(dev, TPS65911_DEVCTRL, data_buffer, 1);
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if (ret)
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return ret;
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data_buffer[0] |= DEVCTRL_DEV_OFF_MASK;
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data_buffer[0] &= ~DEVCTRL_DEV_ON_MASK;
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ret = dm_i2c_write(dev, TPS65911_DEVCTRL, data_buffer, 1);
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if (ret)
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return ret;
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// wait some time and then print error
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mdelay(5000);
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printf("Failed to power off!!!\n");
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return 1;
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}
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#endif
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/*
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* Routine: pinmux_init
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* Description: Do individual peripheral pinmux configs
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*/
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void pinmux_init(void)
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{
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pinmux_config_pingrp_table(transformer_pinmux_common,
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ARRAY_SIZE(transformer_pinmux_common));
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pinmux_config_drvgrp_table(transformer_padctrl,
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ARRAY_SIZE(transformer_padctrl));
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if (of_machine_is_compatible("asus,tf700t")) {
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pinmux_config_pingrp_table(tf700t_mipi_pinmux,
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ARRAY_SIZE(tf700t_mipi_pinmux));
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}
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}
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#ifdef CONFIG_MMC_SDHCI_TEGRA
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static void tps65911_voltage_init(void)
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{
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struct udevice *dev;
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int ret;
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ret = i2c_get_chip_for_busnum(0, TPS65911_I2C_ADDRESS, 1, &dev);
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if (ret) {
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log_debug("cannot find PMIC I2C chip\n");
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return;
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}
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/* TPS659110: LDO1_REG = 3.3v, ACTIVE to SDMMC4 */
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ret = dm_i2c_reg_write(dev, TPS65911_LDO1, 0xc9);
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if (ret)
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log_debug("vcore_emmc set failed: %d\n", ret);
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if (of_machine_is_compatible("asus,tf600t")) {
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/* TPS659110: VDD1_REG = 1.2v, ACTIVE to backlight */
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ret = dm_i2c_reg_write(dev, TPS65911_VDD1_OP, 0x33);
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if (ret)
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log_debug("vdd_bl set failed: %d\n", ret);
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ret = dm_i2c_reg_write(dev, TPS65911_VDD1, 0x0d);
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if (ret)
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log_debug("vdd_bl enable failed: %d\n", ret);
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/* TPS659110: LDO5_REG = 3.3v, ACTIVE to SDMMC1 VIO */
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ret = dm_i2c_reg_write(dev, TPS65911_LDO5, 0x65);
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if (ret)
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log_debug("vdd_usd set failed: %d\n", ret);
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/* TPS659110: LDO6_REG = 1.2v, ACTIVE to MIPI */
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ret = dm_i2c_reg_write(dev, TPS65911_LDO6, 0x11);
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if (ret)
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log_debug("vdd_mipi set failed: %d\n", ret);
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} else {
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/* TPS659110: LDO2_REG = 3.1v, ACTIVE to SDMMC1 */
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ret = dm_i2c_reg_write(dev, TPS65911_LDO2, 0xb9);
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if (ret)
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log_debug("vdd_usd set failed: %d\n", ret);
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/* TPS659110: LDO3_REG = 3.1v, ACTIVE to SDMMC1 VIO */
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ret = dm_i2c_reg_write(dev, TPS65911_LDO3, 0x5d);
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if (ret)
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log_debug("vddio_usd set failed: %d\n", ret);
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}
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/* TPS659110: GPIO0_REG output high to VDD_5V0_SBY */
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ret = dm_i2c_reg_write(dev, TPS65911_GPIO0, 0x07);
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if (ret)
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log_debug("vdd_5v0_sby set failed: %d\n", ret);
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/* TPS659110: GPIO6_REG output high to VDD_3V3_SYS */
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ret = dm_i2c_reg_write(dev, TPS65911_GPIO6, 0x07);
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if (ret)
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log_debug("vdd_3v3_sys set failed: %d\n", ret);
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/* TPS659110: GPIO7_REG output high to VDD_1V5_DDR */
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ret = dm_i2c_reg_write(dev, TPS65911_GPIO7, 0x07);
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if (ret)
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log_debug("vdd_1v5_ddr set failed: %d\n", ret);
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/* TPS659110: GPIO8_REG pull_down output high to VDD_5V0_SYS */
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ret = dm_i2c_reg_write(dev, TPS65911_GPIO8, 0x0f);
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if (ret)
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log_debug("vdd_5v0_sys set failed: %d\n", ret);
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}
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/*
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* Routine: pin_mux_mmc
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* Description: setup the MMC muxes, power rails, etc.
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*/
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void pin_mux_mmc(void)
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{
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/* Bring up uSD and eMMC power */
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tps65911_voltage_init();
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}
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#endif /* MMC */
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#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
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int ft_board_setup(void *blob, struct bd_info *bd)
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{
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/* Remove TrustZone nodes */
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fdt_del_node_and_alias(blob, "/firmware");
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fdt_del_node_and_alias(blob, "/reserved-memory/trustzone@bfe00000");
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return 0;
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}
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#endif
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void nvidia_board_late_init(void)
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{
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char serialno_str[17];
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/* Set chip id as serialno */
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sprintf(serialno_str, "%016llx", tegra_chip_uid());
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env_set("serial#", serialno_str);
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env_set("platform", "Tegra 3 T30");
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}
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