Michal Simek 39d3c3cfaa xilinx: common: Add support for SOC detection ... Code supports board detection based on information available in EEPROM in legacy or FRU format. But this is not enough for emulation and simulation systems which are lacking these identification EEPROMs. But SOC itself has normally registers for SOC identification. Based on them it is possible to compose detected name. That's why prepare infrastructure in common location for SOC platform detection which is called before board platform detection. SOC platform detection shouldn't detect real silicon and should fallback to current existing mechanism to identify boards based on EEPROMs. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/329a8da338927b082e26a958bf69bb18af072420.1662460837.git.michal.simek@amd.com		2022-09-13 11:32:48 +02:00
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bootscripts	xilinx: Add sd boot command script for reference	2019-10-08 09:11:13 +02:00
common	xilinx: common: Add support for SOC detection	2022-09-13 11:32:48 +02:00
microblaze-generic	arm64: xilinx: Move board_get_usable_ram_top() to common location	2022-09-13 11:32:48 +02:00
versal	arm64: xilinx: Move board_get_usable_ram_top() to common location	2022-09-13 11:32:48 +02:00
zynq	xilinx: Define only mmc devnum not partition	2022-09-13 11:32:48 +02:00
zynqmp	arm64: xilinx: Move board_get_usable_ram_top() to common location	2022-09-13 11:32:48 +02:00
zynqmp_r5	.mailmap: Start to use new amd.com email address	2022-04-19 14:51:11 -04:00
Kconfig	xilinx: Kconfig: add XILINX_OF_BOARD_DTB_ADDR default value for microblaze	2022-01-05 10:22:03 +01:00