mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-19 11:18:28 +00:00
150c24936b
The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h. Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines & structs that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20' 'root' file. All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard works OK. Signed-off-by: Tom Warren <twarren@nvidia.com>
125 lines
3.2 KiB
C
125 lines
3.2 KiB
C
/*
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* Copyright (c) 2011 The Chromium OS Authors.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/gpio.h>
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#include <asm/arch/pinmux.h>
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#include <asm/arch/uart-spi-switch.h>
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#include <asm/arch/tegra.h>
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#include <asm/arch-tegra/tegra_spi.h>
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/* position of the UART/SPI select switch */
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enum spi_uart_switch {
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SWITCH_UNKNOWN,
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SWITCH_SPI,
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SWITCH_UART,
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SWITCH_BOTH
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};
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/* Information about the spi/uart switch */
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struct spi_uart {
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int gpio; /* GPIO to control switch */
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u32 port; /* Port number of UART affected */
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};
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static struct spi_uart local;
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static enum spi_uart_switch switch_pos; /* Current switch position */
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static void get_config(struct spi_uart *config)
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{
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#if defined CONFIG_SPI_CORRUPTS_UART
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config->gpio = CONFIG_UART_DISABLE_GPIO;
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config->port = CONFIG_SPI_CORRUPTS_UART_NR;
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#else
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config->gpio = -1;
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#endif
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}
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/*
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* Init the UART / SPI switch. This can be called before relocation so we must
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* not access BSS.
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*/
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void gpio_early_init_uart(void)
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{
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struct spi_uart config;
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get_config(&config);
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if (config.gpio != -1) {
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/* Cannot provide a label prior to relocation */
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gpio_request(config.gpio, NULL);
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gpio_direction_output(config.gpio, 0);
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}
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}
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/*
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* Configure the UART / SPI switch.
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*/
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void gpio_config_uart(void)
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{
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get_config(&local);
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if (local.gpio != -1) {
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gpio_direction_output(local.gpio, 0);
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switch_pos = SWITCH_UART;
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} else {
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/*
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* If we're here we don't have a SPI switch; go ahead and
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* enable the SPI now. We didn't in spi_init() so we wouldn't
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* kill the UART.
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*/
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pinmux_set_func(PINGRP_GMC, PMUX_FUNC_SFLASH);
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switch_pos = SWITCH_BOTH;
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}
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}
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static void spi_uart_switch(struct spi_uart *config,
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enum spi_uart_switch new_pos)
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{
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if (switch_pos == SWITCH_BOTH || new_pos == switch_pos)
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return;
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/* pre-delay, allow SPI/UART to settle, FIFO to empty, etc. */
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udelay(CONFIG_SPI_CORRUPTS_UART_DLY);
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/* We need to dynamically change the pinmux, shared w/UART RXD/CTS */
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pinmux_set_func(PINGRP_GMC, new_pos == SWITCH_SPI ?
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PMUX_FUNC_SFLASH : PMUX_FUNC_UARTD);
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/*
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* On Seaboard, MOSI/MISO are shared w/UART.
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* Use GPIO I3 (UART_DISABLE) to tristate UART during SPI activity.
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* Enable UART later (cs_deactivate) so we can use it for U-Boot comms.
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*/
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gpio_direction_output(config->gpio, new_pos == SWITCH_SPI);
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switch_pos = new_pos;
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}
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void pinmux_select_uart(void)
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{
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spi_uart_switch(&local, SWITCH_UART);
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}
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void pinmux_select_spi(void)
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{
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spi_uart_switch(&local, SWITCH_SPI);
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}
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