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https://github.com/AsahiLinux/u-boot
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eb3a6e3283
Add support for the iproc Broadcom NAND controller, used in Northstar SoCs for example. Based on the Linux driver. Cc: Philippe Reynes <philippe.reynes@softathome.com> Cc: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/all/20230308214231.378013-1-linus.walleij@linaro.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
148 lines
3.5 KiB
C
148 lines
3.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Code borrowed from the Linux driver
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* Copyright (C) 2015 Broadcom Corporation
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <memalign.h>
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#include <nand.h>
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#include <linux/bitops.h>
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#include <linux/err.h>
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#include <linux/errno.h>
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <dm.h>
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#include "brcmnand.h"
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struct iproc_nand_soc {
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struct brcmnand_soc soc;
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void __iomem *idm_base;
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void __iomem *ext_base;
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};
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#define IPROC_NAND_CTLR_READY_OFFSET 0x10
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#define IPROC_NAND_CTLR_READY BIT(0)
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#define IPROC_NAND_IO_CTRL_OFFSET 0x00
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#define IPROC_NAND_APB_LE_MODE BIT(24)
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#define IPROC_NAND_INT_CTRL_READ_ENABLE BIT(6)
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static bool iproc_nand_intc_ack(struct brcmnand_soc *soc)
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{
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struct iproc_nand_soc *priv =
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container_of(soc, struct iproc_nand_soc, soc);
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void __iomem *mmio = priv->ext_base + IPROC_NAND_CTLR_READY_OFFSET;
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u32 val = brcmnand_readl(mmio);
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if (val & IPROC_NAND_CTLR_READY) {
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brcmnand_writel(IPROC_NAND_CTLR_READY, mmio);
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return true;
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}
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return false;
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}
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static void iproc_nand_intc_set(struct brcmnand_soc *soc, bool en)
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{
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struct iproc_nand_soc *priv =
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container_of(soc, struct iproc_nand_soc, soc);
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void __iomem *mmio = priv->idm_base + IPROC_NAND_IO_CTRL_OFFSET;
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u32 val = brcmnand_readl(mmio);
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if (en)
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val |= IPROC_NAND_INT_CTRL_READ_ENABLE;
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else
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val &= ~IPROC_NAND_INT_CTRL_READ_ENABLE;
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brcmnand_writel(val, mmio);
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}
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static void iproc_nand_apb_access(struct brcmnand_soc *soc, bool prepare,
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bool is_param)
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{
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struct iproc_nand_soc *priv =
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container_of(soc, struct iproc_nand_soc, soc);
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void __iomem *mmio = priv->idm_base + IPROC_NAND_IO_CTRL_OFFSET;
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u32 val;
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val = brcmnand_readl(mmio);
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/*
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* In the case of BE or when dealing with NAND data, always configure
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* the APB bus to LE mode before accessing the FIFO and back to BE mode
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* after the access is done
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*/
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if (IS_ENABLED(CONFIG_SYS_BIG_ENDIAN) || !is_param) {
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if (prepare)
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val |= IPROC_NAND_APB_LE_MODE;
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else
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val &= ~IPROC_NAND_APB_LE_MODE;
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} else { /* when in LE accessing the parameter page, keep APB in BE */
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val &= ~IPROC_NAND_APB_LE_MODE;
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}
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brcmnand_writel(val, mmio);
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}
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static int iproc_nand_probe(struct udevice *dev)
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{
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struct udevice *pdev = dev;
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struct iproc_nand_soc *priv = dev_get_priv(dev);
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struct brcmnand_soc *soc;
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struct resource res;
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int ret;
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soc = &priv->soc;
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ret = dev_read_resource_byname(pdev, "iproc-idm", &res);
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if (ret)
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return ret;
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priv->idm_base = devm_ioremap(dev, res.start, resource_size(&res));
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if (IS_ERR(priv->idm_base))
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return PTR_ERR(priv->idm_base);
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ret = dev_read_resource_byname(pdev, "iproc-ext", &res);
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if (ret)
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return ret;
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priv->ext_base = devm_ioremap(dev, res.start, resource_size(&res));
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if (IS_ERR(priv->ext_base))
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return PTR_ERR(priv->ext_base);
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soc->ctlrdy_ack = iproc_nand_intc_ack;
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soc->ctlrdy_set_enabled = iproc_nand_intc_set;
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soc->prepare_data_bus = iproc_nand_apb_access;
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return brcmnand_probe(pdev, soc);
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}
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static const struct udevice_id iproc_nand_dt_ids[] = {
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{
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.compatible = "brcm,nand-iproc",
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},
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{ /* sentinel */ }
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};
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U_BOOT_DRIVER(iproc_nand) = {
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.name = "iproc-nand",
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.id = UCLASS_MTD,
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.of_match = iproc_nand_dt_ids,
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.probe = iproc_nand_probe,
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.priv_auto = sizeof(struct iproc_nand_soc),
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};
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void board_nand_init(void)
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{
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struct udevice *dev;
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int ret;
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ret = uclass_get_device_by_driver(UCLASS_MTD,
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DM_DRIVER_GET(iproc_nand), &dev);
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if (ret && ret != -ENODEV)
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pr_err("Failed to initialize %s. (error %d)\n", dev->name,
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ret);
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}
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