mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-17 18:28:55 +00:00
61b3a0101a
The rzg2_beacon_defconfig creates an image for RZ/G2[MNH] and as such creates three different device trees and each of them have a corresponding -u-boot.dtsi file which are basically copies of each other. Create a common include file to be referenced by each of the respective board-u-boot.dtsi files to reduce duplicate code and simplify support going forward. This also restores some lost functionality from the device tree re-sync and updates the MAINTAINER file to include all beacon-renesom device tree files. Signed-off-by: Adam Ford <aford173@gmail.com>
75 lines
1 KiB
Text
75 lines
1 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2021 LogicPD dba Beacon EmbeddedWorks
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*/
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/ {
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aliases {
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spi0 = &rpc;
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};
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soc {
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u-boot,dm-pre-reloc;
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};
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};
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&cpg {
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u-boot,dm-pre-reloc;
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};
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&ehci0 {
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clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, <&versaclock5 3>;
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};
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&ehci1 {
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clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, <&versaclock5 3>;
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};
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&extal_clk {
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u-boot,dm-pre-reloc;
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};
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&extalr_clk {
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u-boot,dm-pre-reloc;
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};
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&prr {
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u-boot,dm-pre-reloc;
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};
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&rpc {
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compatible = "renesas,rcar-gen3-rpc";
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num-cs = <1>;
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spi-max-frequency = <40000000>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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flash0: spi-flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0>;
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compatible = "spi-flash", "jedec,spi-nor";
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spi-max-frequency = <40000000>;
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <1>;
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};
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};
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&sdhi0 {
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/delete-property/ cd-gpios;
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sd-uhs-sdr12;
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sd-uhs-sdr25;
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sd-uhs-sdr104;
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max-frequency = <208000000>;
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};
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&sdhi2 {
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status = "disabled";
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};
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&sdhi3 {
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mmc-ddr-1_8v;
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mmc-hs200-1_8v;
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mmc-hs400-1_8v;
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};
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