mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-13 00:17:23 +00:00
8af21b094d
All build targets using this driver already use DM_MMC. So let's depend this driver on this Kconfig symbol and remove the non-DM driver part. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Cc: Peng Fan <peng.fan@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
101 lines
2.3 KiB
C
101 lines
2.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Marvell SD Host Controller Interface
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*/
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#include <common.h>
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#include <dm.h>
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#include <malloc.h>
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#include <sdhci.h>
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#include <asm/global_data.h>
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#include <linux/mbus.h>
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#define MVSDH_NAME "mv_sdh"
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#define SDHCI_WINDOW_CTRL(win) (0x4080 + ((win) << 4))
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#define SDHCI_WINDOW_BASE(win) (0x4084 + ((win) << 4))
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DECLARE_GLOBAL_DATA_PTR;
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struct mv_sdhci_plat {
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struct mmc_config cfg;
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struct mmc mmc;
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};
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static void sdhci_mvebu_mbus_config(void __iomem *base)
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{
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const struct mbus_dram_target_info *dram;
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int i;
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dram = mvebu_mbus_dram_info();
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for (i = 0; i < 4; i++) {
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writel(0, base + SDHCI_WINDOW_CTRL(i));
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writel(0, base + SDHCI_WINDOW_BASE(i));
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}
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for (i = 0; i < dram->num_cs; i++) {
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const struct mbus_dram_window *cs = dram->cs + i;
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/* Write size, attributes and target id to control register */
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writel(((cs->size - 1) & 0xffff0000) | (cs->mbus_attr << 8) |
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(dram->mbus_dram_target_id << 4) | 1,
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base + SDHCI_WINDOW_CTRL(i));
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/* Write base address to base register */
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writel(cs->base, base + SDHCI_WINDOW_BASE(i));
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}
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}
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static int mv_sdhci_probe(struct udevice *dev)
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{
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struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
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struct mv_sdhci_plat *plat = dev_get_plat(dev);
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struct sdhci_host *host = dev_get_priv(dev);
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int ret;
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host->name = MVSDH_NAME;
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host->ioaddr = dev_read_addr_ptr(dev);
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host->quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_WAIT_SEND_CMD;
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host->mmc = &plat->mmc;
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host->mmc->dev = dev;
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host->mmc->priv = host;
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ret = mmc_of_parse(dev, &plat->cfg);
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if (ret)
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return ret;
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ret = sdhci_setup_cfg(&plat->cfg, host, 0, 0);
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if (ret)
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return ret;
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/* Configure SDHCI MBUS mbus bridge windows */
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sdhci_mvebu_mbus_config(host->ioaddr);
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upriv->mmc = host->mmc;
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return sdhci_probe(dev);
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}
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static int mv_sdhci_bind(struct udevice *dev)
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{
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struct mv_sdhci_plat *plat = dev_get_plat(dev);
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return sdhci_bind(dev, &plat->mmc, &plat->cfg);
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}
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static const struct udevice_id mv_sdhci_ids[] = {
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{ .compatible = "marvell,armada-380-sdhci" },
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{ }
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};
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U_BOOT_DRIVER(mv_sdhci_drv) = {
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.name = MVSDH_NAME,
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.id = UCLASS_MMC,
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.of_match = mv_sdhci_ids,
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.bind = mv_sdhci_bind,
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.probe = mv_sdhci_probe,
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.ops = &sdhci_ops,
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.priv_auto = sizeof(struct sdhci_host),
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.plat_auto = sizeof(struct mv_sdhci_plat),
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};
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