mirror of
https://github.com/AsahiLinux/u-boot
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6e7df1d151
At this point, the remaining places where we have a symbol that is defined as CONFIG_... are in fairly odd locations. While as much dead code has been removed as possible, some of these locations are simply less obvious at first. In other cases, this code is used, but was defined in such a way as to have been missed by earlier checks. Perform a rename of all such remaining symbols to be CFG_... rather than CONFIG_... Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
93 lines
2.2 KiB
C
93 lines
2.2 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2000-2004
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
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* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
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*/
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#include <common.h>
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#include <irq_func.h>
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#include <watchdog.h>
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#include <asm/processor.h>
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#include <asm/immap.h>
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#include <asm/io.h>
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#ifdef CONFIG_M5272
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int interrupt_init(void)
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{
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intctrl_t *intp = (intctrl_t *) (MMAP_INTC);
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/* disable all external interrupts */
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out_be32(&intp->int_icr1, 0x88888888);
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out_be32(&intp->int_icr2, 0x88888888);
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out_be32(&intp->int_icr3, 0x88888888);
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out_be32(&intp->int_icr4, 0x88888888);
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out_be32(&intp->int_pitr, 0x00000000);
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/* initialize vector register */
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out_8(&intp->int_pivr, 0x40);
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enable_interrupts();
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return 0;
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}
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#if defined(CONFIG_MCFTMR)
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void dtimer_intr_setup(void)
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{
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intctrl_t *intp = (intctrl_t *) (CFG_SYS_INTR_BASE);
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clrbits_be32(&intp->int_icr1, INT_ICR1_TMR3MASK);
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setbits_be32(&intp->int_icr1, CFG_SYS_TMRINTR_PRI);
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}
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#endif /* CONFIG_MCFTMR */
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#endif /* CONFIG_M5272 */
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#if defined(CONFIG_M5208) || defined(CONFIG_M5282) || \
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defined(CONFIG_M5271) || defined(CONFIG_M5275)
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int interrupt_init(void)
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{
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int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE);
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/* Make sure all interrupts are disabled */
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#if defined(CONFIG_M5208)
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out_be32(&intp->imrl0, 0xffffffff);
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out_be32(&intp->imrh0, 0xffffffff);
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#else
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setbits_be32(&intp->imrl0, 0x1);
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#endif
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enable_interrupts();
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return 0;
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}
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#if defined(CONFIG_MCFTMR)
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void dtimer_intr_setup(void)
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{
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int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE);
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out_8(&intp->icr0[CFG_SYS_TMRINTR_NO], CFG_SYS_TMRINTR_PRI);
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clrbits_be32(&intp->imrl0, 0x00000001);
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clrbits_be32(&intp->imrl0, CFG_SYS_TMRINTR_MASK);
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}
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#endif /* CONFIG_MCFTMR */
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#endif /* CONFIG_M5282 | CONFIG_M5271 | CONFIG_M5275 */
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#if defined(CONFIG_M5249) || defined(CONFIG_M5253)
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int interrupt_init(void)
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{
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enable_interrupts();
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return 0;
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}
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#if defined(CONFIG_MCFTMR)
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void dtimer_intr_setup(void)
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{
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mbar_writeLong(MCFSIM_IMR, mbar_readLong(MCFSIM_IMR) & ~0x00000400);
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mbar_writeByte(MCFSIM_TIMER2ICR, CFG_SYS_TMRINTR_PRI);
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}
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#endif /* CONFIG_MCFTMR */
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#endif /* CONFIG_M5249 || CONFIG_M5253 */
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